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74HC4024D,652 PDF预览

74HC4024D,652

更新时间: 2024-11-30 15:30:27
品牌 Logo 应用领域
恩智浦 - NXP 光电二极管逻辑集成电路触发器
页数 文件大小 规格书
19页 180K
描述
74HC4024 - 7-stage binary ripple counter SOIC 14-Pin

74HC4024D,652 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:SOIC包装说明:SOP, SOP14,.25
针数:14Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:7.89计数方向:UP
系列:HC/UHJESD-30 代码:R-PDSO-G14
JESD-609代码:e4长度:8.65 mm
负载电容(CL):50 pF负载/预设输入:NO
逻辑集成电路类型:BINARY COUNTER最大频率@ Nom-Sup:20000000 Hz
最大I(ol):0.004 A工作模式:ASYNCHRONOUS
湿度敏感等级:1位数:7
功能数量:1端子数量:14
最高工作温度:125 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP14,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
电源:2/6 V传播延迟(tpd):265 ns
认证状态:Not Qualified座面最大高度:1.75 mm
子类别:Counters最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:NICKEL PALLADIUM GOLD
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
触发器类型:NEGATIVE EDGE宽度:3.9 mm
最小 fmax:24 MHzBase Number Matches:1

74HC4024D,652 数据手册

 浏览型号74HC4024D,652的Datasheet PDF文件第2页浏览型号74HC4024D,652的Datasheet PDF文件第3页浏览型号74HC4024D,652的Datasheet PDF文件第4页浏览型号74HC4024D,652的Datasheet PDF文件第5页浏览型号74HC4024D,652的Datasheet PDF文件第6页浏览型号74HC4024D,652的Datasheet PDF文件第7页 
74HC4024  
7-stage binary ripple counter  
Rev. 6 — 23 August 2012  
Product data sheet  
1. General description  
The 74HC4024 is a high-speed Si-gate CMOS device and is pin compatible with the 4024  
of the 4000B series. The 74HC4024 is specified in compliance with JEDEC  
standard no. 7A.  
The 74HC4024 is a 7-stage binary ripple counter with a clock input (CP), an overriding  
asynchronous master reset input (MR) and seven fully buffered parallel outputs (Q0 to  
Q6). The counter advances on the HIGH-to-LOW transition of CP. A HIGH on MR clears  
all counter stages and forces all outputs LOW, independent of the state of CP. Each  
counter stage is a static toggle flip-flop.  
Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock  
rise and fall times.  
2. Features and benefits  
Low-power dissipation  
Complies with JEDEC standard no. 7A  
ESD protection:  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V.  
Multiple package options  
Specified from 40 C to +80 C and from 40 C to +125 C.  
3. Applications  
Frequency dividing circuits  
Time delay circuits.  
 
 
 

74HC4024D,652 替代型号

型号 品牌 替代类型 描述 数据表
74HC4024D,653 NXP

完全替代

74HC4024 - 7-stage binary ripple counter SOIC 14-Pin
74HC4024DB,118 NXP

完全替代

74HC4024 - 7-stage binary ripple counter SSOP1 14-Pin
74HC4024DB,112 NXP

完全替代

74HC4024 - 7-stage binary ripple counter SSOP1 14-Pin

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