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74HC132DB,112 PDF预览

74HC132DB,112

更新时间: 2024-11-05 14:40:15
品牌 Logo 应用领域
恩智浦 - NXP PC光电二极管逻辑集成电路
页数 文件大小 规格书
20页 182K
描述
74HC(T)132 - Quad 2-input NAND Schmitt trigger SSOP1 14-Pin

74HC132DB,112 技术参数

是否Rohs认证:符合生命周期:Transferred
零件包装代码:SSOP1包装说明:SSOP, SSOP14,.3
针数:14Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.26
Is Samacsys:N系列:HC/UH
JESD-30 代码:R-PDSO-G14JESD-609代码:e4
长度:6.2 mm负载电容(CL):50 pF
逻辑集成电路类型:NAND GATE最大I(ol):0.004 A
湿度敏感等级:1功能数量:4
输入次数:2端子数量:14
最高工作温度:125 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP14,.3封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH包装方法:TUBE
峰值回流温度(摄氏度):260电源:2/6 V
Prop。Delay @ Nom-Sup:31 ns传播延迟(tpd):38 ns
认证状态:Not Qualified施密特触发器:YES
座面最大高度:2 mm子类别:Gates
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:NICKEL PALLADIUM GOLD端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:5.3 mm
Base Number Matches:1

74HC132DB,112 数据手册

 浏览型号74HC132DB,112的Datasheet PDF文件第2页浏览型号74HC132DB,112的Datasheet PDF文件第3页浏览型号74HC132DB,112的Datasheet PDF文件第4页浏览型号74HC132DB,112的Datasheet PDF文件第5页浏览型号74HC132DB,112的Datasheet PDF文件第6页浏览型号74HC132DB,112的Datasheet PDF文件第7页 
74HC132; 74HCT132  
Quad 2-input NAND Schmitt trigger  
Rev. 3 — 30 August 2012  
Product data sheet  
1. General description  
The 74HC132; 74HCT132 is a high-speed Si-gate CMOS device and is pin compatible  
with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard  
No. 7A  
The 74HC132; 74HCT132 is a quad 2-input NAND gate with Schmitt trigger inputs. This  
device features reduced input threshold levels to allow interfacing to TTL logic levels.  
Inputs also include clamp diodes that enable the use of current limiting resistors to  
interface inputs to voltages in excess of VCC. Schmitt trigger inputs transform slowly  
changing input signals into sharply defined jitter-free output signals.  
The inputs switch at different points for positive and negative-going signals. The difference  
between the positive voltage VT+ and the negative voltage VTis defined as the input  
hysteresis voltage VH.  
2. Features and benefits  
ESD protection:  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V  
Multiple package options  
Specified from 40 C to +85 C and from 40 C to +125 C  
3. Applications  
Wave and pulse shapers  
Astable multivibrators  
Monostable multivibrators  
 
 
 

74HC132DB,112 替代型号

型号 品牌 替代类型 描述 数据表
74HC132DB,118 NXP

完全替代

74HC(T)132 - Quad 2-input NAND Schmitt trigger SSOP1 14-Pin

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