是否无铅: | 不含铅 | 是否Rohs认证: | 符合 |
生命周期: | Obsolete | 零件包装代码: | TSSOP |
包装说明: | TSSOP, TSSOP64,.32,20 | 针数: | 64 |
Reach Compliance Code: | compliant | HTS代码: | 8542.39.00.01 |
风险等级: | 5.5 | Is Samacsys: | N |
控制类型: | INDEPENDENT CONTROL | 计数方向: | BIDIRECTIONAL |
系列: | GTL/TVC | JESD-30 代码: | R-PDSO-G64 |
JESD-609代码: | e4 | 长度: | 17 mm |
逻辑集成电路类型: | REGISTERED BUS TRANSCEIVER | 最大I(ol): | 0.05 A |
湿度敏感等级: | 1 | 位数: | 9 |
功能数量: | 2 | 端口数量: | 2 |
端子数量: | 64 | 最高工作温度: | 85 °C |
最低工作温度: | -40 °C | 输出特性: | 3-STATE |
输出极性: | TRUE | 封装主体材料: | PLASTIC/EPOXY |
封装代码: | TSSOP | 封装等效代码: | TSSOP64,.32,20 |
封装形状: | RECTANGULAR | 封装形式: | SMALL OUTLINE, THIN PROFILE, SHRINK PITCH |
峰值回流温度(摄氏度): | 260 | 电源: | 3.3 V |
最大电源电流(ICC): | 60 mA | Prop。Delay @ Nom-Sup: | 5.7 ns |
传播延迟(tpd): | 0.25 ns | 认证状态: | Not Qualified |
座面最大高度: | 1.2 mm | 子类别: | Bus Driver/Transceivers |
最大供电电压 (Vsup): | 3.45 V | 最小供电电压 (Vsup): | 3.15 V |
标称供电电压 (Vsup): | 3.3 V | 表面贴装: | YES |
技术: | BICMOS | 温度等级: | INDUSTRIAL |
端子面层: | Nickel/Palladium/Gold (Ni/Pd/Au) | 端子形式: | GULL WING |
端子节距: | 0.5 mm | 端子位置: | DUAL |
处于峰值回流温度下的最长时间: | NOT SPECIFIED | 翻译: | GTL/P & LVTTL |
触发器类型: | POSITIVE EDGE | 宽度: | 6.1 mm |
Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
74GTL16622DGG | NXP |
获取价格 |
IC GTL/TVC SERIES, 18-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56, Bus Driver/Transcei | |
74GTL16622DGG-T | NXP |
获取价格 |
IC GTL/TVC SERIES, 18-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56, Bus Driver/Transcei | |
74GTL16622DL | NXP |
获取价格 |
IC GTL/TVC SERIES, 18-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56, Bus Driver/Transcei | |
74GTL16622DL-T | NXP |
获取价格 |
IC GTL/TVC SERIES, 18-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56, Bus Driver/Transcei | |
74GTL16923DGGRE4 | TI |
获取价格 |
18-BIT LVTTL-TO-GTL/GTL+ BUS TRANSCEIVER | |
74GTL16923DGGRG4 | TI |
获取价格 |
GTL/TVC SERIES, DUAL 9-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO64, GREEN, PLASTIC, TS | |
74GTL2005 | SGMICRO |
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Quad GTL/GTL+ to LVTTL/TTL Bidirectional Non-Latched Translator | |
74GTLP1395DGVRE4 | TI |
获取价格 |
TWO 1-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVERS WITH SPLIT LVTTL PORT, FEEDB | |
74GTLP1395DGVRG4 | TI |
获取价格 |
Two 1-Bit LVTTL/GTLP Adj-Edge-Rate Bus Xcvrs w Split LVTTL Port, Fdbk Path and Selectable | |
74GTLP2033DGGRE4 | TI |
获取价格 |
8-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE REGISTERED TRANSCEIVER WITH SPLIT LVTTL PORT AND |