5秒后页面跳转
74AUP1T14GX PDF预览

74AUP1T14GX

更新时间: 2024-10-29 11:11:43
品牌 Logo 应用领域
安世 - NEXPERIA /
页数 文件大小 规格书
14页 229K
描述
Low-power inverter with voltage-level translatorProduction

74AUP1T14GX 数据手册

 浏览型号74AUP1T14GX的Datasheet PDF文件第2页浏览型号74AUP1T14GX的Datasheet PDF文件第3页浏览型号74AUP1T14GX的Datasheet PDF文件第4页浏览型号74AUP1T14GX的Datasheet PDF文件第5页浏览型号74AUP1T14GX的Datasheet PDF文件第6页浏览型号74AUP1T14GX的Datasheet PDF文件第7页 
74AUP1T14  
Low-power inverter with voltage-level translator  
Rev. 3 — 25 January 2022  
Product data sheet  
1. General description  
The 74AUP1T14 provides a single inverting function. This device ensures a very low static and  
dynamic power consumption across the entire VCC range from 2.3 V to 3.6 V.  
The 74AUP1T14 is designed for logic-level translation applications with input switching levels that  
accept 1.8 V low-voltage CMOS signals, while operating from either a single 2.5 V or 3.3 V supply  
voltage.  
The wide supply voltage range ensures normal operation as battery voltage drops from 3.6 V to  
2.3 V.  
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry  
disables the output, preventing the damaging backflow current through the device when it is  
powered down.  
Schmitt trigger inputs make the circuit tolerant to slower input rise and fall times across the entire  
VCC range.  
2. Features and benefits  
Wide supply voltage range from 2.3 V to 3.6 V  
High noise immunity  
ESD protection:  
HBM JESD22-A114F Class 3A exceeds 5000 V  
CDM JESD22-C101E exceeds 1000 V  
Low static power consumption; ICC = 1.5 μA (maximum)  
Latch-up performance exceeds 100 mA per JESD 78 Class II  
Inputs accept voltages up to 3.6 V  
Low noise overshoot and undershoot < 10 % of VCC  
IOFF circuitry provides partial power-down mode operation  
Specified from -40 °C to +85 °C and -40 °C to +125 °C  
3. Ordering information  
Table 1. Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
74AUP1T14GW -40 °C to +125 °C  
TSSOP5  
plastic thin shrink small outline package; 5 leads;  
body width 1.25 mm  
SOT353-1  
74AUP1T14GX -40 °C to +125 °C  
X2SON5  
plastic thermal enhanced extremely thin  
small outline package; no leads; 5 terminals;  
body 0.8 × 0.8 × 0.32 mm  
SOT1226-3  
 
 
 

与74AUP1T14GX相关器件

型号 品牌 获取价格 描述 数据表
74AUP1T17GW NEXPERIA

获取价格

Low-power buffer with voltage-level translatorProduction
74AUP1T17GX NEXPERIA

获取价格

Low-power buffer with voltage-level translatorProduction
74AUP1T32 NEXPERIA

获取价格

Low-power 2-input OR-gate with voltage-level translator
74AUP1T32GW NEXPERIA

获取价格

Low-power 2-input OR-gate with voltage-level translator
74AUP1T32GX NEXPERIA

获取价格

Low-power 2-input OR-gate with voltage-level translator
74AUP1T34 NXP

获取价格

Low-power dual supply translating buffer
74AUP1T34 DIODES

获取价格

Single Bit Dual Power Supply Translating Buffer with 3 State Outputs
74AUP1T34GF NXP

获取价格

Low-power dual supply translating buffer
74AUP1T34GM NXP

获取价格

Low-power dual supply translating buffer
74AUP1T34GM NEXPERIA

获取价格

Low-power dual supply translating bufferProduction