Datasheet > 74AUP1T14GX

74AUP1T14GX

更新时间： 2023-09-03 20:29:30

品牌	Logo	应用领域
安世 - NEXPERIA		/
页数	文件大小	规格书
14页	229K
描述
Low-power inverter with voltage-level translatorProduction

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74AUP1T14GX 数据手册

Nexperia

74AUP1T14

Low-power inverter with voltage-level translator

4. Marking

Table 2. Marking

Type number

Marking code[1]

74AUP1T14GW

74AUP1T14GX

[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.

5. Functional diagram

mna023

mna024

mna025

Fig. 1. Logic symbol

Fig. 2. IEC logic symbol

Fig. 3. Logic diagram

6. Pinning information

6.1. Pinning

74AUP1T14

n.c.

GND

aaa-027770

Transparent top view

aaa-027769

Fig. 4. Pin configuration SOT353-1 (TSSOP5)

Fig. 5. Pin configuration SOT1226-3 (X2SON5)

6.2. Pin description

Table 3. Pin description

Symbol

n.c.

Description

not connected

data input

GND

ground (0 V)

data output

V_CC

supply voltage

74AUP1T14

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 3 — 25 January 2022

2 / 14

123 4 5 6 7...14

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