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74ALVCH16344DGGRE4 PDF预览

74ALVCH16344DGGRE4

更新时间: 2024-11-06 05:05:51
品牌 Logo 应用领域
德州仪器 - TI 驱动器输出元件双倍数据速率
页数 文件大小 规格书
12页 284K
描述
1-BIT TO 4-BIT ADDRESS DRIVER WITH 3-STATE OUTPUTS

74ALVCH16344DGGRE4 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP, TSSOP56,.3,20针数:56
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.72系列:ALVC/VCX/A
JESD-30 代码:R-PDSO-G56JESD-609代码:e4
长度:14 mm逻辑集成电路类型:BUS DRIVER
湿度敏感等级:1位数:4
功能数量:4端口数量:2
端子数量:56最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP56,.3,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260电源:1.8/3.3 V
传播延迟(tpd):4.6 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Other Logic ICs
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:6.1 mm
Base Number Matches:1

74ALVCH16344DGGRE4 数据手册

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SN74ALVCH16344  
1-BIT TO 4-BIT ADDRESS DRIVER  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCES054HSEPTEMBER 1995REVISED SEPTEMBER 2004  
FEATURES  
DGG OR DL PACKAGE  
(TOP VIEW)  
Member of the Texas Instruments Widebus™  
Family  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
OE1  
1B1  
1B2  
GND  
1B3  
1B4  
OE4  
8B1  
8B2  
GND  
8B3  
8B4  
Bus Hold on Data Inputs Eliminates the Need  
for External Pullup/Pulldown Resistors  
2
3
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
4
5
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
6
7
V
CC  
V
CC  
8
1A  
2B1  
2B2  
GND  
2B3  
2B4  
2A  
8A  
9
7B1  
7B2  
GND  
7B3  
7B4  
7A  
DESCRIPTION/ORDERING INFORMATION  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
This 1-bit to 4-bit address driver is designed for  
1.65-V to 3.6-V VCC operation.  
The SN74ALVCH16344 is used in applications in  
which four separate memory locations must be  
addressed by a single address.  
3A  
6A  
3B1  
3B2  
GND  
3B3  
3B4  
4A  
6B1  
6B2  
GND  
6B3  
6B4  
5A  
To ensure the high-impedance state during power up  
or power down, OE should be tied to VCC through a  
pullup resistor; the minimum value of the resistor is  
determined by the current-sinking capability of the  
driver.  
Active bus-hold circuitry holds unused or undriven  
inputs at a valid logic state. Use of pullup or pulldown  
resistors with the bus-hold circuitry is not  
recommended.  
V
CC  
V
CC  
4B1 23  
4B2 24  
GND 25  
4B3 26  
4B4 27  
OE2 28  
34 5B1  
33 5B2  
32 GND  
31 5B3  
30 5B4  
29 OE3  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
SN74ALVCH16344DL  
TOP-SIDE MARKING  
Tube  
SSOP - DL  
TSSOP - DGG  
ALVCH16344  
ALVCH16344  
-40°C to 85°C  
Tape and reel  
Tape and reel  
SN74ALVCH16344DLR  
SN74ALVCH16344DGGR  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
FUNCTION TABLE  
INPUTS  
OUTPUT  
Bn  
OE  
L
A
H
L
H
L
L
H
H
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1995–2004, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

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