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74ALVCH16373MTD PDF预览

74ALVCH16373MTD

更新时间: 2024-11-18 12:58:03
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 锁存器
页数 文件大小 规格书
7页 98K
描述
Bus Driver, ALVC/VCX/A Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, 6.10 MM, MO-153, TSSOP-48

74ALVCH16373MTD 技术参数

生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP,针数:48
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.06Is Samacsys:N
系列:ALVC/VCX/AJESD-30 代码:R-PDSO-G48
长度:12.5 mm逻辑集成电路类型:BUS DRIVER
位数:8功能数量:2
端口数量:2端子数量:48
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
传播延迟(tpd):7.8 ns认证状态:Not Qualified
座面最大高度:1.2 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):1.65 V标称供电电压 (Vsup):1.8 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
宽度:6.1 mmBase Number Matches:1

74ALVCH16373MTD 数据手册

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October 2001  
Revised February 2002  
74ALVCH16373  
Low Voltage 16-Bit Transparent Latch with Bushold  
General Description  
Features  
The ALVCH16373 contains sixteen non-inverting latches  
with 3-STATE outputs and is intended for bus oriented  
applications. The device is byte controlled. The flip-flops  
appear to be transparent to the data when the Latch  
Enable (LE) is HIGH. When LE is LOW, the data that meets  
the setup time is latched. Data appears on the bus when  
the Output Enable (OE) is LOW. When OE is HIGH, the  
outputs are in a high impedance state.  
1.65V to 3.6V VCC supply operation  
3.6V tolerant control inputs and outputs  
Bushold on data inputs eliminates the need for external  
pull-up/pull-down resistors  
tPD (In to On)  
3.6 ns max for 3.0V to 3.6V VCC  
4.5 ns max for 2.3V to 2.7V VCC  
6.8 ns max for 1.65V to 1.95V VCC  
The ALVCH16373 data inputs include active bushold cir-  
cuitry, eliminating the need for external pull-up resistors to  
hold unused or floating data inputs at a valid logic level.  
Uses patented noise/EMI reduction circuitry  
Latch-up conforms to JEDEC JED78  
ESD performance:  
The 74ALVCH16373 is designed for low voltage (1.65V to  
3.6V) VCC applications with output compatibility up to 3.6V.  
The 74ALVCH16373 is fabricated with an advanced CMOS  
technology to achieve high speed operation while maintain-  
ing low CMOS power dissipation.  
Human body model > 2000V  
Machine model > 200V  
Ordering Code:  
Package  
Order Number  
Package Description  
Number  
74ALVCH16373T  
MTD48  
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Logic Symbol  
© 2002 Fairchild Semiconductor Corporation  
DS500631  
www.fairchildsemi.com  

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