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74ALVCH16373TX PDF预览

74ALVCH16373TX

更新时间: 2024-11-08 23:24:07
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 总线驱动器总线收发器逻辑集成电路光电二极管
页数 文件大小 规格书
7页 98K
描述
LATCH|DUAL|8-BIT|AVC/ALVC-CMOS|TSSOP|48PIN|PLASTIC

74ALVCH16373TX 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:6.10 MM, MO-153, TSSOP-48
针数:48Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.07
Is Samacsys:N系列:ALVC/VCX/A
JESD-30 代码:R-PDSO-G48JESD-609代码:e3
长度:12.5 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.024 A
湿度敏感等级:2位数:8
功能数量:2端口数量:2
端子数量:48最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP48,.3,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:3.3 VProp。Delay @ Nom-Sup:3.9 ns
传播延迟(tpd):7.8 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:FF/Latches
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:6.1 mm
Base Number Matches:1

74ALVCH16373TX 数据手册

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October 2001  
Revised February 2002  
74ALVCH16373  
Low Voltage 16-Bit Transparent Latch with Bushold  
General Description  
Features  
The ALVCH16373 contains sixteen non-inverting latches  
with 3-STATE outputs and is intended for bus oriented  
applications. The device is byte controlled. The flip-flops  
appear to be transparent to the data when the Latch  
Enable (LE) is HIGH. When LE is LOW, the data that meets  
the setup time is latched. Data appears on the bus when  
the Output Enable (OE) is LOW. When OE is HIGH, the  
outputs are in a high impedance state.  
1.65V to 3.6V VCC supply operation  
3.6V tolerant control inputs and outputs  
Bushold on data inputs eliminates the need for external  
pull-up/pull-down resistors  
tPD (In to On)  
3.6 ns max for 3.0V to 3.6V VCC  
4.5 ns max for 2.3V to 2.7V VCC  
6.8 ns max for 1.65V to 1.95V VCC  
The ALVCH16373 data inputs include active bushold cir-  
cuitry, eliminating the need for external pull-up resistors to  
hold unused or floating data inputs at a valid logic level.  
Uses patented noise/EMI reduction circuitry  
Latch-up conforms to JEDEC JED78  
ESD performance:  
The 74ALVCH16373 is designed for low voltage (1.65V to  
3.6V) VCC applications with output compatibility up to 3.6V.  
The 74ALVCH16373 is fabricated with an advanced CMOS  
technology to achieve high speed operation while maintain-  
ing low CMOS power dissipation.  
Human body model > 2000V  
Machine model > 200V  
Ordering Code:  
Package  
Order Number  
Package Description  
Number  
74ALVCH16373T  
MTD48  
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Logic Symbol  
© 2002 Fairchild Semiconductor Corporation  
DS500631  
www.fairchildsemi.com  

74ALVCH16373TX 替代型号

型号 品牌 替代类型 描述 数据表
PI74VCX16373AEX PERICOM

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Bus Driver, ALVC/VCX/A Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, 0.240 INCH, GREEN
PI74VCX16373AE PERICOM

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16-Bit Transparent D-Type Latch with 3-State Outputs
74ALVCH16373DGGRG4 TI

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16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS

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