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74ALVCH162836VRE4 PDF预览

74ALVCH162836VRE4

更新时间： 2024-11-06 21:10:39
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管输出元件逻辑集成电路电视
页数 文件大小 规格书
16页 362K
描述
ALVC/VCX/A SERIES, 20-BIT DRIVER, TRUE OUTPUT, PDSO56, GREEN, PLASTIC, TVSOP-56

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74ALVCH162836VRE4 技术参数

是否无铅： 含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：SSOP
包装说明：TSSOP, TSSOP56,.25,16针数：56
Reach Compliance Code：compliant风险等级：5.84
控制类型：ENABLE LOW系列：ALVC/VCX/A
JESD-30 代码：R-PDSO-G56JESD-609代码：e4
长度：11.3 mm负载电容（CL）：50 pF
逻辑集成电路类型：BUS DRIVER最大I（ol）：0.012 A
湿度敏感等级：1位数：20
功能数量：1端口数量：2
端子数量：56最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE WITH SERIES RESISTOR
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP56,.25,16
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法：TAPE AND REEL峰值回流温度（摄氏度）：260
电源：3.3 VProp。Delay @ Nom-Sup：4 ns
传播延迟（tpd）：5.5 ns认证状态：Not Qualified
座面最大高度：1.2 mm子类别：Bus Driver/Transceivers
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：1.65 V
标称供电电压 (Vsup)：1.8 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：0.4 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：4.4 mm
Base Number Matches：1

74ALVCH162836VRE4 数据手册

 浏览型号74ALVCH162836VRE4的Datasheet PDF文件第2页浏览型号74ALVCH162836VRE4的Datasheet PDF文件第3页浏览型号74ALVCH162836VRE4的Datasheet PDF文件第4页浏览型号74ALVCH162836VRE4的Datasheet PDF文件第5页浏览型号74ALVCH162836VRE4的Datasheet PDF文件第6页浏览型号74ALVCH162836VRE4的Datasheet PDF文件第7页 
SN74ALVCH162836  
20-BIT UNIVERSAL BUS DRIVER  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCES122F–JULY 1997–REVISED OCTOBER 2004  
FEATURES  
DGG, DGV, OR DL PACKAGE  
(TOP VIEW)  
•
•
•
Member of the Texas Instruments Widebus™  
Family  
OE  
Y1  
1
2
3
4
5
6
7
8
9
10  
56 CLK  
55 A1  
EPIC™ (Enhanced-Performance Implanted  
CMOS) Submicron Process  
54  
Y2  
GND  
Y3  
A2  
Output Port Has Equivalent 26-Ω Series  
Resistors, So No External Resistors Are  
Required  
53 GND  
52 A3  
Y4  
51 A4  
•
•
Designed to Comply With JEDEC 168-Pin and  
200-Pin SDRAM Buffered DIMM Specification  
V
CC  
50  
49  
48  
47  
V
CC  
Y5  
Y6  
Y7  
A5  
A6  
A7  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
GND 11  
Y8 12  
Y9 13  
46 GND  
45 A8  
•
•
•
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
44 A9  
Bus Hold on Data Inputs Eliminates the Need  
for External Pullup/Pulldown Resistors  
14  
15  
16  
17  
43  
42  
41  
40  
Y10  
Y11  
Y12  
Y13  
A10  
A11  
A12  
A13  
Package Options Include Plastic Shrink  
Small-Outline (DL), Thin Shrink Small-Outline  
(DGG), and Thin Very Small-Outline (DGV)  
Packages  
GND 18  
39 GND  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
Y14  
Y15  
Y16  
A14  
A15  
A16  
NOTE: For tape-and-reel order entry, the DGGR package is  
abbreviated to GR, and the DGVR package is abbreviated  
to VR.  
V
CC  
V
CC  
Y17  
Y18  
GND  
Y19  
Y20  
NC  
A17  
A18  
GND  
A19  
A20  
LE  
DESCRIPTION  
This 20-bit universal bus driver is designed for 1.65-V  
to 3.6-V VCC operation.  
Data flow from  
A to Y is controlled by the  
output-enable (OE) input. The device operates in the  
transparent mode when the latch-enable (LE) input is  
low. When LE is high, the A data is latched if the  
clock (CLK) input is held at a high or low logic level. If  
LE is high, the A data is stored in the latch/flip-flop on  
the low-to-high transition of CLK. When OE is high,  
the outputs are in the high-impedance state.  
NC − No internal connection  
The output port includes equivalent 26-Ω series resistors to reduce overshoot and undershoot.  
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.  
The SN74ALVCH162836 is characterized for operation from -40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus, EPIC are trademarks of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1997–2004, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
1234567...16

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