5秒后页面跳转
74ALVCH162827GRE4 PDF预览

74ALVCH162827GRE4

更新时间: 2024-11-06 14:47:03
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
11页 158K
描述
ALVC/VCX/A SERIES, DUAL 10-BIT DRIVER, TRUE OUTPUT, PDSO56, GREEN, PLASTIC, TSSOP-56

74ALVCH162827GRE4 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP, TSSOP56,.3,20针数:56
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.17其他特性:WITH DUAL OUTPUT ENABLE
控制类型:ENABLE LOW系列:ALVC/VCX/A
JESD-30 代码:R-PDSO-G56JESD-609代码:e4
长度:14 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.012 A
湿度敏感等级:1位数:10
功能数量:2端口数量:2
端子数量:56最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE WITH SERIES RESISTOR
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP56,.3,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:3.3 VProp。Delay @ Nom-Sup:3.8 ns
传播延迟(tpd):4.4 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:6.1 mm
Base Number Matches:1

74ALVCH162827GRE4 数据手册

 浏览型号74ALVCH162827GRE4的Datasheet PDF文件第2页浏览型号74ALVCH162827GRE4的Datasheet PDF文件第3页浏览型号74ALVCH162827GRE4的Datasheet PDF文件第4页浏览型号74ALVCH162827GRE4的Datasheet PDF文件第5页浏览型号74ALVCH162827GRE4的Datasheet PDF文件第6页浏览型号74ALVCH162827GRE4的Datasheet PDF文件第7页 
SN74ALVCH162827  
20-BIT BUFFER/DRIVER  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCES013HJULY 1995REVISED AUGUST 2004  
FEATURES  
DGG, DGV, OR DL PACKAGE  
(TOP VIEW)  
Member of the Texas Instruments Widebus™  
Family  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
1OE1  
1Y1  
1Y2  
GND  
1Y3  
1OE2  
1A1  
1A2  
GND  
1A3  
Output Ports Have Equivalent 26-Series  
Resistors, So No External Resistors Are  
Required  
2
3
4
Bus Hold on Data Inputs Eliminates the Need  
for External Pullup/Pulldown Resistors  
5
6
1Y4  
1A4  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
7
V
CC  
V
CC  
8
1Y  
1Y6  
1Y7  
GND  
1Y8  
1Y9  
1Y10  
2Y1  
2Y2  
2Y3  
GND  
2Y4  
2Y5  
2Y6  
1A5  
1A6  
1A7  
GND  
1A8  
1A9  
1A10  
2A1  
2A2  
2A3  
GND  
2A4  
2A5  
2A6  
ESD Protection Exceeds JESD 22  
- 2000-V Human-Body Model (A114-A)  
- 200-V Machine Model (A115-A)  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
- 1000-V Charged-Device Model (C101)  
DESCRIPTION/ORDERING INFORMATION  
This 20-bit noninverting buffer/driver is designed for  
1.65-V to 3.6-V VCC operation.  
The SN74ALVCH162827 is composed of two 10-bit  
sections with separate output-enable signals. For  
either 10-bit buffer section, the two output-enable  
(1OE1 and 1OE2 or 2OE1 and 2OE2) inputs must  
both be low for the corresponding Y outputs to be  
active. If either output-enable input is high, the  
outputs of that 10-bit buffer section are in the  
high-impedance state.  
V
CC  
V
CC  
2Y7  
2Y8  
GND  
2Y9  
2Y10  
2OE1  
2A7  
2A8  
GND  
2A9  
2A10  
2OE2  
The outputs, which are designed to sink up to 12 mA,  
include equivalent 26-resistors to reduce overshoot  
and undershoot.  
To ensure the high-impedance state during power up  
or power down, OE should be tied to VCC through a  
pullup resistor; the minimum value of the resistor is  
determined by the current-sinking capability of the  
driver.  
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors  
with the bus-hold circuitry is not recommended.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
SN74ALVCH162827DL  
TOP-SIDE MARKING  
Tube  
SSOP - DL  
ALVCH162827  
Tape and reel  
SN74ALVCH162827DLR  
SN74ALVCH162827GR  
-40°C to 85°C  
TSSOP - DGG  
TVSOP - DGV  
Tape and reel  
Tape and reel  
ALVCH162827  
VH2827  
SN74ALVCH162827VR  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1995–2004, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

74ALVCH162827GRE4 替代型号

型号 品牌 替代类型 描述 数据表
74ALVCH16827DGGRE4 TI

完全替代

20-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74ALVCH162827GR TI

完全替代

20-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74ALVCH16827DGGR TI

类似代替

20-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS

与74ALVCH162827GRE4相关器件

型号 品牌 获取价格 描述 数据表
74ALVCH162830GRG4 TI

获取价格

ALVC/VCX/A SERIES, 18-BIT DRIVER, TRUE OUTPUT, PDSO80, GREEN, PLASTIC, TSSOP-80
74ALVCH162836VRE4 TI

获取价格

ALVC/VCX/A SERIES, 20-BIT DRIVER, TRUE OUTPUT, PDSO56, GREEN, PLASTIC, TVSOP-56
74ALVCH16344DGGRE4 TI

获取价格

1-BIT TO 4-BIT ADDRESS DRIVER WITH 3-STATE OUTPUTS
74ALVCH16344DGGRG4 TI

获取价格

1-BIT TO 4-BIT ADDRESS DRIVER WITH 3-STATE OUTPUTS
74ALVCH16344DLG4 TI

获取价格

1-BIT TO 4-BIT ADDRESS DRIVER WITH 3-STATE OUTPUTS
74ALVCH16344DLRG4 TI

获取价格

1-BIT TO 4-BIT ADDRESS DRIVER WITH 3-STATE OUTPUTS
74ALVCH16373 FAIRCHILD

获取价格

Low Voltage 16-Bit Transparent Latch with Bushold
74ALVCH16373 NXP

获取价格

2.5V/3.3V 16-bit D-type transparent latch 3-State
74ALVCH16373 STMICROELECTRONICS

获取价格

LOW VOLTAGE CMOS 16-BITD-TYPE LATCH (3-STATE) WITH 3.6V TOLERANT INPUTS AND OUTPUTS
74ALVCH16373/D ETC

获取价格

Low-Voltage 16-Bit Transparent Latch with Bus Hold 1.8/2.5/3.3 V