Datasheet > 74AHCT32PW

74AHCT32PW

更新时间： 2024-09-20 11:12:39

品牌	Logo	应用领域
安世 - NEXPERIA		/
页数	文件大小	规格书
13页	223K
描述
Quad 2-input OR gateProduction

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74AHCT32PW 数据手册

74AHC32; 74AHCT32

Quad 2-input OR gate

Rev. 5 — 5 June 2020

Product data sheet

1. General description

The 74AHC32; 74AHCT32 is a quad 2-input OR gate. Inputs are overvoltage tolerant. This feature

allows the use of these devices as translators in mixed voltage environments.

2. Features and benefits

•

Wide supply voltage range from 2.0 V to 5.5 V

Input levels:

For 74AHC32: CMOS level

For 74AHCT32: TTL level

•

Balanced propagation delays

All inputs have Schmitt-trigger actions

Overvoltage tolerant inputs to 5.5 V

High noise immunity

CMOS low power dissipation

ESD protection:

•

HBM EIA/JESD22-A114E exceeds 2000 V

MM EIA/JESD22-A115-A exceeds 200 V

CDM EIA/JESD22-C101C exceeds 1000 V

•

Latch-up performance exceeds 100 mA per JESD 78 Class II Level A

Multiple package options

Specified from -40 °C to +85 °C and from -40 °C to +125 °C

3. Ordering information

Table 1. Ordering information

Type number

Package

Temperature range Name

Description

Version

74AHC32D

-40 °C to +125 °C

SO14

plastic small outline package; 14 leads;

body width 3.9 mm

SOT108-1

74AHCT32D

74AHC32PW

74AHCT32PW

74AHC32BQ

74AHCT32BQ

TSSOP14

plastic thin shrink small outline package; 14 leads; SOT402-1

body width 4.4 mm

DHVQFN14 plastic dual in-line compatible thermal

enhanced very thin quad flat package; no leads;

14 terminals; body 2.5 × 3 × 0.85 mm

SOT762-1

12 3 4 5 6 7...13

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74AHCT32PW-T	NXP	获取价格	暂无描述
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74AHCT32S14-13	DIODES	获取价格	QUADRUPLE 2-INPUT OR GATES
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