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74ACT16640WDLR PDF预览

74ACT16640WDLR

更新时间： 2024-11-18 19:53:03
品牌 Logo 应用领域
德州仪器 - TI 光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
6页 115K
描述
ACT SERIES, DUAL 8-BIT TRANSCEIVER, INVERTED OUTPUT, PDSO48, 0.300 INCH, 0.025 INCH PITCH, PLASTIC, SSOP-48

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74ACT16640WDLR 技术参数

生命周期：Obsolete零件包装代码：SSOP
包装说明：SSOP,针数：48
Reach Compliance Code：unknown风险等级：5.67
系列：ACTJESD-30 代码：R-PDSO-G48
长度：15.875 mm逻辑集成电路类型：BUS TRANSCEIVER
位数：8功能数量：2
端口数量：2端子数量：48
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：INVERTED
封装主体材料：PLASTIC/EPOXY封装代码：SSOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, SHRINK PITCH
传播延迟（tpd）：10.5 ns认证状态：Not Qualified
座面最大高度：2.79 mm最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：GULL WING
端子节距：0.635 mm端子位置：DUAL
宽度：7.5 mmBase Number Matches：1

74ACT16640WDLR 数据手册

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SCAS173A - JULY 1990 - REVISED APRIL 1996  
54ACT16640 . . . WD PACKAGE  
74ACT16640 . . . DL PACKAGE  
(TOP VIEW)  
D
Members of the Texas Instruments  
Widebusā Family  
Inputs Are TTL-Voltage Compatible  
D
D
Flow-Through Architecture Optimizes  
PCB Layout  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
1DIR  
1B1  
1B2  
GND  
1B3  
1B4  
1OE  
1A1  
1A2  
GND  
1A3  
1A4  
2
D
D
D
D
Distributed V  
Minimizes High-Speed Switching Noise  
and GND Pin Configuration  
3
CC  
4
5
EPIC(Enhanced-Performance Implanted  
CMOS) 1-µm Process  
500-mA Typical Latch-Up Immunity at  
6
7
V
V
CC  
CC  
8
1B5  
1B6  
GND  
1B7  
1B8  
2B1  
2B2  
GND  
2B3  
2B4  
1A5  
1A6  
GND  
1A7  
1A8  
2A1  
2A2  
GND  
2A3  
2A4  
125°C  
9
Packaged in Plastic 300-mil Shrink  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
Small-Outline (DL) Packages Using 25-mil  
Center-to-Center Pin Spacings and 380-mil  
Fine-Pitch Ceramic Flat (WD) Packages  
Using 25-mil Center-to-Center Spacings  
description  
The ’ACT16640 are inverting 16-bit transceivers  
designed for asynchronous communication  
between data buses.  
V
V
CC  
CC  
2B5  
2B6  
GND  
2B7  
2B8  
2A5  
2A6  
GND  
2A7  
2A8  
2OE  
These devices can be used as two 8-bit  
transceivers or one 16-bit transceiver. They allow  
data transmission from the A bus to the B bus or  
from the B bus to the A bus, depending on the logic  
level at the direction-control (1DIR and 2DIR)  
inputs. The output-enable (1OE and 2OE) inputs  
can be used to disable the device so that the  
buses are effectively isolated.  
2DIR  
The 74ACT16640 is packaged in TI’s shrink small-outline package, which provides twice the I/O pin count and  
functionality of standard small-outline packages in the same printed-circuit-board area.  
The 54ACT16640 is characterized for operation over the full military temperature range of −55°C to 125°C. The  
74ACT16640 is characterized for operation from −40°C to 85°C.  
FUNCTION TABLE  
(each section)  
INPUTS  
OPERATION  
OE  
L
DIR  
L
B data to A bus  
A data to B bus  
Isolation  
L
H
H
X
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC and Widebus are trademarks of Texas Instruments Incorporated.  
Copyright 1996, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443  
123456

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