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74ACT16646SSC PDF预览

74ACT16646SSC

更新时间: 2024-11-17 22:21:15
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 总线驱动器总线收发器触发器逻辑集成电路光电二极管
页数 文件大小 规格书
6页 65K
描述
16-Bit Transceiver/Register with 3-STATE Outputs

74ACT16646SSC 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SSOP包装说明:SSOP, SSOP56,.4
针数:56Reach Compliance Code:compliant
风险等级:5.29控制类型:INDEPENDENT CONTROL
计数方向:BIDIRECTIONAL系列:ACT
JESD-30 代码:R-PDSO-G56JESD-609代码:e3
长度:18.415 mm逻辑集成电路类型:REGISTERED BUS TRANSCEIVER
最大I(ol):0.024 A湿度敏感等级:1
位数:8功能数量:2
端口数量:2端子数量:56
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP56,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:5 VProp。Delay @ Nom-Sup:9.3 ns
传播延迟(tpd):10.1 ns认证状态:Not Qualified
座面最大高度:2.74 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED翻译:N/A
触发器类型:POSITIVE EDGE宽度:7.5 mm
Base Number Matches:1

74ACT16646SSC 数据手册

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August 1999  
Revised October 1999  
74ACT16646  
16-Bit Transceiver/Register with 3-STATE Outputs  
General Description  
Features  
The ACT16646 contains sixteen non-inverting bidirectional  
registered bus transceivers providing multiplexed transmis-  
sion of data directly from the input bus or from the internal  
storage registers. Each byte has separate control inputs  
which can be shorted together for full 16-bit operation. The  
DIR inputs determine the direction of data flow through the  
device. The CPAB and CPBA inputs load data into the reg-  
isters on the LOW-to-HIGH transition.  
Independent registers for A and B buses  
Multiplexed real-time and stored data transfers  
Separate control logic for each byte  
16-bit version of the ACT646  
Outputs source/sink 24 mA  
TTL-compatible inputs  
Ordering Code:  
Order Number  
74ACT16646SSC  
74ACT16646MTD  
Package Number  
MS56A  
Package Description  
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide  
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
MTD56  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
FACT is a trademark of Fairchild Semiconductor Corporation.  
© 1999 Fairchild Semiconductor Corporation  
DS500345  
www.fairchildsemi.com  

74ACT16646SSC 替代型号

型号 品牌 替代类型 描述 数据表
74ACT16646MTDX FAIRCHILD

完全替代

Dual 8-bit Bus Transceiver
74ACTQ16646MTD FAIRCHILD

完全替代

16-Bit Transceiver/Register with 3-STATE Outputs
74ACTQ16646SSC FAIRCHILD

完全替代

16-Bit Transceiver/Register with 3-STATE Outputs

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