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74ACT16821

更新时间： 2024-11-18 12:50:35
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德州仪器 - TI 触发器输出元件
页数 文件大小 规格书
9页 169K
描述
20-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS

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74ACT16821 数据手册

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SCAS176A − JANUARY 1991 − REVISED APRIL 1996  
54ACT16821 . . . WD PACKAGE  
74ACT16821 . . . DL PACKAGE  
(TOP VIEW)  
D
Members of the Texas Instruments  
WidebusFamily  
Inputs Are TTL-Voltage Compatible  
D
D
Provide Extra Data Width Necessary for  
Wider Address/Data Paths or Buses With  
Parity  
1OE  
1Q1  
1Q2  
GND  
1Q3  
1Q4  
1CLK  
1D1  
1D2  
GND  
1D3  
1D4  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
2
3
D
D
D
D
Flow-Through Architecture Optimizes  
PCB Layout  
4
5
6
Distributed V  
Minimizes High-Speed Switching Noise  
and GND Pin Configuration  
CC  
V
V
7
CC  
CC  
1Q5  
1Q6  
1Q7  
GND  
1Q8  
1D5  
1D6  
1D7  
GND  
1D8  
8
EPIC(Enhanced-Performance Implanted  
CMOS) 1-µm Process  
Package Options Include 300-mil Shrink  
Small-Outline (DL) Packages Using 25-mil  
Center-to-Center Pin Spacings and 380-mil  
Fine-Pitch Ceramic Flat (WD) Packages  
Using 25-mil Center-to-Center Pin Spacings  
9
10  
11  
12  
1Q9 13  
1Q10 14  
2Q1 15  
2Q2 16  
2Q3 17  
GND 18  
2Q4 19  
2Q5 20  
2Q6 21  
44 1D9  
43 1D10  
42 2D1  
41 2D2  
40 2D3  
39 GND  
38 2D4  
37 2D5  
36 2D6  
description  
These 20-bit flip-flops feature 3-state outputs  
designed specifically for driving highly-capacitive  
or relatively low-impedance loads. They are  
particularly suitable for implementing wider buffer  
registers, I/O ports, parity bus interfacing, and  
working registers.  
22  
23  
24  
25  
26  
27  
28  
35  
34  
33  
32  
31  
30  
29  
V
V
CC  
CC  
2Q7  
2Q8  
GND  
2Q9  
2Q10  
2OE  
2D7  
2D8  
GND  
2D9  
2D10  
2CLK  
The ’ACT16821 can be used as two 10-bit  
flip-flops or one 20-bit flip-flop. On the positive  
transition of the clock (CLK) input, the Q outputs  
follow the data (D) inputs. Each 10-bit flip-flop  
section has a buffered output-enable (1OE or  
2OE) input that can be used to place the ten  
outputs in either a normal logic state (high or low  
logic levels) or the high-impedance state. In the  
high-impedance state, the outputs neither load  
nor drive the bus lines significantly.  
OE does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered  
while the outputs are in the high-impedance state.  
The 74ACT16821 is packaged in theTI shrink small-outline package, which provides twice the I/O pin count and  
functionality of standard small-outline packages in the same printed-circuit-board area.  
The 54ACT16821 is characterized for operation over the full military temperature range of −55°C to 125°C. The  
74ACT16821 is characterized for operation from −40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC and Widebus are trademarks of Texas Instruments Incorporated.  
Copyright 1996, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443  
1234567...9

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