5秒后页面跳转
74AC11377DW PDF预览

74AC11377DW

更新时间: 2024-11-20 19:44:23
品牌 Logo 应用领域
德州仪器 - TI 光电二极管逻辑集成电路触发器
页数 文件大小 规格书
10页 117K
描述
Octal D-Type Positive-Edge-Triggered Flip-Flops With Clock Enable 24-SOIC -40 to 85

74AC11377DW 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP, SOP24,.4针数:24
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.88其他特性:WITH HOLD MODE
系列:ACJESD-30 代码:R-PDSO-G24
长度:15.4 mm负载电容(CL):50 pF
逻辑集成电路类型:D FLIP-FLOP最大频率@ Nom-Sup:60000000 Hz
最大I(ol):0.024 A位数:8
功能数量:1端子数量:24
最高工作温度:85 °C最低工作温度:-40 °C
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP24,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3/5 V
传播延迟(tpd):12.9 ns认证状态:Not Qualified
座面最大高度:2.65 mm子类别:FF/Latches
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:7.5 mm
最小 fmax:100 MHzBase Number Matches:1

74AC11377DW 数据手册

 浏览型号74AC11377DW的Datasheet PDF文件第2页浏览型号74AC11377DW的Datasheet PDF文件第3页浏览型号74AC11377DW的Datasheet PDF文件第4页浏览型号74AC11377DW的Datasheet PDF文件第5页浏览型号74AC11377DW的Datasheet PDF文件第6页浏览型号74AC11377DW的Datasheet PDF文件第7页 
ꢆ ꢃꢇꢂꢈꢉꢊ ꢋꢇꢌ ꢍꢎꢉ ꢏꢈ ꢐꢍ ꢋ ꢏꢈꢆ  
ꢑ ꢐꢇ ꢒꢉ ꢃꢈ ꢆꢃꢓ ꢉ ꢎꢔ ꢂꢕ ꢈ  
SCAS101 − D3420, FEBRUARY 1990 − REVISED APRIL 1993  
DW OR NT PACKAGE  
(TOP VIEW)  
Contains Eight D-Type Flip-Flops  
Clock Enable Latched to Avoid False  
Clocking  
1Q  
2Q  
CLKEN  
1D  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
2
Applications Include: Buffer/Storage  
Registers, Shift Registers, Pattern  
Generators  
3Q  
2D  
3
4Q  
3D  
4
GND  
GND  
GND  
GND  
5Q  
4D  
5
Flow-Through Architecture Optimizes  
6
V
V
CC  
CC  
PCB Layout  
7
Center-Pin V  
and GND Configuration  
Minimizes High-Speed Switching Noise  
CC  
8
5D  
9
6D  
EPICt (Enhanced-Performance Implanted  
10  
11  
12  
6Q  
7D  
CMOS) 1-mm Process  
7Q  
8D  
500-mA Typical Latch-Up Immunity at 125°C  
8Q  
CLK  
Package Options Include Plastic Small  
Outline Packages and Standard Plastic  
300-mil DIPs  
description  
These circuits are positive-edge-triggered D-type flip-flops with a clock enable input.  
Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the  
positive-going edge of the clock pulse if CLKEN is low. Clock triggering occurs at a particular voltage level and  
is not directly related to the transition time of the positive-going pulse. When the clock input is at either the high  
or low level, the D input signal has no effect at the output. The circuits are designed to prevent false clocking  
by transitions at the CLKEN input.  
The 74AC11377 is characterized for operation from − 40°C to 85°C.  
FUNCTION TABLE  
(each flip-flop)  
INPUTS  
OUTPUT  
Q
CLKEN CLK  
D
X
H
L
H
L
X
L
Q
0
H
L
L
X
X
Q
0
EPIC is a trademark of Texas Instruments Incorporated.  
ꢇꢤ  
Copyright 1993, Texas Instruments Incorporated  
ꢠ ꢤ ꢡ ꢠꢙ ꢚꢮ ꢜꢛ ꢟ ꢧꢧ ꢥꢟ ꢝ ꢟ ꢞ ꢤ ꢠ ꢤ ꢝ ꢡ ꢩ  
2−1  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

与74AC11377DW相关器件

型号 品牌 获取价格 描述 数据表
74AC11377DWR TI

获取价格

Octal D-Type Positive-Edge-Triggered Flip-Flops With Clock Enable 24-SOIC -40 to 85
74AC11377N NXP

获取价格

OCTAL D TYPE FLIP FLOP WITH ENABLE
74AC11377N YAGEO

获取价格

D Flip-Flop, AC Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, PDIP24
74AC11377N TI

获取价格

OCTAL D TYPE FLIP FLOP WITH ENABLE
74AC11377NT TI

获取价格

Octal D-Type Positive-Edge-Triggered Flip-Flops With Clock Enable 24-PDIP -40 to 85
74AC11378 NXP

获取价格

HEX D-TYPE FLIP FLOP WITH ENABLE, POSITIVE EDGE TRIGGER
74AC11378 TI

获取价格

HEX D-TYPE FLIP FLOP WITH ENABLE, POSITIVE EDGE TRIGGER
74AC11378_10 TI

获取价格

HEX D-TYPE FLIP FLOP WITH ENABLE, POSITIVE EDGE TRIGGER
74AC11378D NXP

获取价格

HEX D-TYPE FLIP FLOP WITH ENABLE, POSITIVE EDGE TRIGGER
74AC11378D TI

获取价格

HEX D-TYPE FLIP FLOP WITH ENABLE, POSITIVE EDGE TRIGGER