Datasheet > 72V36102L15PFG

72V36102L15PFG

更新时间： 2024-09-16 04:44:11

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
29页	252K
描述
TQFP-120, Tray

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

72V36102L15PFG 数据手册

3.3 VOLT CMOS SyncBiFIFO^TM

16,384 x 36 x 2

32,768 x 36 x 2

IDT72V3682

IDT72V3692

IDT72V36102

65,536 x 36 x 2

• Mailbox bypass register for each FIFO

• Programmable Almost-Full and Almost-Empty flags

• Microprocessor Interface Control Logic

FEATURES

• Memory storage capacity:

IDT72V3682 – 16,384 x 36 x 2

• FFA/IRA, EFA/ORA, AEA, and AFA flags synchronized by CLKA

• FFB/IRB, EFB/ORB, AEB, and AFB flags synchronized by CLKB

• Select IDT Standard timing (using EFA, EFB, FFA and FFB flags

functions) or First Word Fall Through timing (using ORA, ORB, IRA

and IRB flag functions)

• Available in space-saving 120-pin Thin Quad Flatpack (TQFP)

• Pin compatible to the lower density parts, IDT72V3622/72V3632/

72V3642/72V3652/72V3662/72V3672

IDT72V3692 – 32,768 x 36 x 2

IDT72V36102 – 65,536 x 36 x 2

• Supports clock frequencies up to 100MHz

• Fast access times of 6.5ns

• Free-running CLKA and CLKB may be asynchronous or coincident

(simultaneous reading and writing of data on a single clock edge

is permitted)

• Two independent clocked FIFOs buffering data in opposite direc-

tions

• Industrial temperature range (–40°C to +85°C) is available

• Green parts available, see ordering information

FUNCTIONAL BLOCK DIAGRAM

MBF1

Mail 1

CLKA

CSA

Port-A

Control

Logic

W/RA

RAM

ARRAY

16,384 x 36

32,768 x 36

65,536 x 36

ENA

MBA

FIFO1,

Mail1

Reset

Logic

RST1

Write

Pointer

Read

Pointer

Status Flag

Logic

EFB/ORB

AEB

FFA/IRA

AFA

FIFO 1

Programmable Flag

Offset Registers

Timing

Mode

FWFT

- A35

B0 - B35

FIFO 2

Status Flag

EFA/ORA

FFB/IRB

AFB

Logic

AEA

Read

Pointer

Write

Pointer

FIFO2,

Mail2

Reset

Logic

RST2

RAM

ARRAY

16,384 x 36

32,768 x 36

65,536 x 36

CLKB

CSB

Port-B

Control

Logic

W/RB

ENB

Mail 2

MBB

4679 drw 01

MBF2

IDTandtheIDTlogoareregisteredtrademarksofIntegratedDeviceTechnology,Inc. TheSyncBiFIFOisatrademarkofIntegratedDeviceTechnology,Inc.

COMMERCIAL TEMPERATURE RANGE

FEBRUARY 2009

DSC-4679/6

12 3 4 5 6 7...29

中文翻译

下载PDF

与72V36102L15PFG相关器件

型号	品牌	获取价格	描述	数据表
72V36103L10PF	IDT	获取价格	TQFP-128, Tray
72V36103L10PF9	IDT	获取价格	TQFP-128, Tray
72V36103L10PFG	IDT	获取价格	FIFO, 64KX36, 6.5ns, Synchronous, CMOS, PQFP128, GREEN, TQFP-128
72V36103L10PFG8	IDT	获取价格	Bi-Directional FIFO, 64KX36, 6.5ns, Synchronous, CMOS, PQFP128
72V36103L15PF9	IDT	获取价格	TQFP-128, Tray
72V36103L15PFG	IDT	获取价格	FIFO, 64KX36, 10ns, Synchronous, CMOS, PQFP128, GREEN, TQFP-128
72V36103L15PFG8	IDT	获取价格	Bi-Directional FIFO, 64KX36, 10ns, Synchronous, CMOS, PQFP128
72V36104L10PF8	IDT	获取价格	TQFP-128, Reel
72V36104L10PF9	IDT	获取价格	TQFP-128, Tray
72V36104L10PFG	IDT	获取价格	Bi-Directional FIFO, 64KX36, 6.5ns, Synchronous, CMOS, PQFP128, GREEN, TQFP-128