XMC7200
XMC7000 microcontroller
32-bit Arm® Cortex®-M7
General description
XMC7200 is a family of XMC7000 microcontrollers targeted at industrial applications. XMC7200 has two
Arm® Cortex®-M7 CPUs for primary processing, and an Arm® Cortex®-M0+ CPU for peripheral and security
processing. These devices contain embedded peripherals supporting Controller Area Network with Flexible Data
rate (CAN FD) and Gigabit Ethernet. XMC7200 devices are manufactured on an advanced 40-nm process. XMC7200
incorporates Infineon’s low-power flash memory, multiple high-performance analog and digital peripherals, and
enables the creation of a secure computing platform.
Features
• CPU subsystem
- One or two 350-MHz 32-bit Arm® Cortex®-M7 CPUs, each with
• Single-cycle multiply
• Single/double-precision floating point unit (FPU)
• 16-KB data cache, 16-KB instruction cache
• Memory Protection Unit (MPU)
• 16-KB instruction and 16-KB data Tightly-Coupled Memories (TCM)
- 100-MHz 32-bit Arm® Cortex® M0+ CPU with
• Single-cycle multiply
• Memory Protection Unit
- Inter-processor communication in hardware
- Three DMA controllers
• Peripheral DMA controller #0 (P-DMA0, DW0) with 143 channels
• Peripheral DMA controller #1 (P-DMA1, DW1) with 65 channels
• Memory DMA controller (M-DMA0, DMAC0) with 8 channels
• Integrated memories
- 8384 KB of code-flash with an additional 256 KB of work-flash
• Read-While-Write (RWW) allows updating the code-flash/work-flash while executing from it
• Single- and dual-bank modes (specifically for Firmware update Over The Air [FOTA])
• Flash programming through SWD/JTAG interface
- 1024-KB of SRAM with selectable retention granularity
• Cryptography engine
- Supports Enhanced Secure Hardware Extension (eSHE) and Hardware Security Module (HSM)
- Secure boot and authentication
• Using digital signature verification
• Using fast secure boot
- AES: 128-bit blocks, 128-/192-/256-bit keys
- 3DES: 64-bit blocks, 64-bit key
- Vector unit supporting asymmetric key cryptography such as Rivest-Shamir-Adleman (RSA) and Elliptic Curve
(ECC)
- SHA-1/2/3: SHA-512, SHA-256, SHA-160 with variable length input data
- CRC: supports CCITT CRC16 and IEEE-802.3 CRC32
- True random number generator (TRNG) and pseudo random number generator (PRNG)
- Galois/Counter Mode (GCM)
• Safety for application
- Memory protection unit (MPU)
- Shared memory protection unit (SMPU)
- Peripheral protection unit (PPU)
Datasheet
www.infineon.com
Please read the Important Notice and Warnings at the end of this document
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002-33522 Rev. *B
2022-10-21