Datasheet > W26020A-25

W26020A-25

更新时间： 2024-11-07 22:14:55

品牌	Logo	应用领域
华邦 - WINBOND		/
页数	文件大小	规格书
10页	127K
描述
128K X 16 High Speed CMOS Static RAM

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W26020A-25 数据手册

W26020A

128K ´ 16 HIGH-SPEED CMOS STATIC RAM

GENERAL DESCRIPTION

The W26020A is a high-speed, low-power CMOS static RAM organized as 131,072 ´ 16 bits that

operates on a single 5-volt power supply. This device is manufactured using Winbond's high

performance CMOS technology.

The W26020A has an active low chip select, separate upper and lower byte selects, and a fast output

enable. No clock or refreshing is required. Separate byte select controls (LB and UB ) allow

individual bytes to be written and read. LB controls I/O1-I/O8, the lower byte. UB controls I/O9-

I/O16, the upper byte. This device is well suited for use in high-density, high-speed system

applications.

FEATURES

· High speed access time: 20/25 nS (max.)

· Low power consumption:

- Active: 1.5W (max.)

· All inputs and outputs directly TTL compatible

· Three-state outputs

· Data byte control

· Single +5V power supply

· Fully static operation

- LB (I/O1- I/O8), UB (I/O9- I/O16)

· Available packages: 44-pin type two TSOP

- No clock or refreshing

PIN CONFIGURATION

BLOCK DIAGRAM

A15

A14

A13

DECODER

CORE

ARRAY

A16

I/O1

I/O2

I/O1

I/O16

CONTROL

DATA I/O

I/O15

I/O14

I/O13

I/O16

I/O3

I/O4

PIN DESCRIPTION

SYMBOL

A0- A16

I/O1- I/O16

DESCRIPTION

I/O5

I/O12

I/O11

I/O10

I/O9

Address Inputs

I/O6

I/O7

I/O8

Data Inputs/Outputs

Chip Select Inputs

Write Enable Input

A12

A11

A10

Output Enable Input

Lower Byte Select I/O1- I/O8

Upper Byte Select I/O9- I/O16

A16

VDD

VSS

Power Supply

Ground

No Connection

Publication Release Date: July 1998

Revision A3

- 1 -

12 3 4 5 6 7...10

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