Datasheet > W26010AT-151

W26010AT-151

更新时间： 2024-11-09 21:57:55

品牌	Logo	应用领域
华邦 - WINBOND		/
页数	文件大小	规格书
10页	159K
描述
64K 16 HIGH-SPEED CMOS STATIC RAM

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中文翻译

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数据手册

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W26010AT-151 数据手册

W26010A

´ 16 HIGH-SPEED CMOS STATIC RAM

64K

GENERAL DESCRIPTION

The W26010A is a high-speed, low-power CMOS static RAM organized as 65,536 ´ 16 bits that

operates on a single 5-volt power supply. This device is manufactured using Winbond's high

performance CMOS technology.

The W26010A has an active low chip select, separate upper and lower byte selects, and a fast output

enable. No clock or refreshing is required. Separate byte select controls (#LB and #UB) allow individual

bytes to be written and read. #LB controls I/O1-I/O8, the lower byte. #UB controls I/O9- I/O16, the

upper byte. This device is well suited for use in high-density, high-speed system applications.

FEATURES

· High speed access time: 15/20/25 nS (max.)

· Low power consumption:

- Active: 1.3W (max.)

· All inputs and outputs directly TTL compatible

· Three-state outputs

· Data byte control

· Single +5V power supply

· Fully static operation

- No clock or refreshing

- #LB (I/O1- I/O8), #UB (I/O9- I/O16)

· Available packages: 44-pin 400 mil SOJ and

Type II TSOP

PIN CONFIGURATION

BLOCK DIAGRAM

A15

A14

A13

DECODER

CORE

ARRAY

A15

#OE

#UB

#LB

#UB

#CS

#OE

#WE

#LB

#CS

I/O1

I/O2

I/O1

I/O16

I/O15

I/O14

I/O13

V_SS

CONTROL

DATA I/O

I/O16

I/O3

I/O4

V_DD

V_SS

PIN DESCRIPTION

V_DD

SYMBOL

DESCRIPTION

I/O12

I/O11

I/O10

I/O9

I/O5

Address Inputs

I/O6

I/O7

I/O8

#WE

A0- A15

I/O1- I/O16

#CS

Data Inputs/Outputs

Chip Select Inputs

Write Enable Input

Output Enable Input

Lower Byte Select I/O1- I/O8

Upper Byte Select I/O9- I/O16

Power Supply

#WE

#OE

A12

A11

#LB

A10

#UB

VDD

VSS

Ground

No Connection

Publication Release Date: May 2001

Revision A5

- 1 -

12 3 4 5 6 7...10

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