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W24L257ACJ-12 PDF预览

W24L257ACJ-12

更新时间: 2024-11-15 10:31:15
品牌 Logo 应用领域
华邦 - WINBOND 静态存储器光电二极管内存集成电路
页数 文件大小 规格书
10页 179K
描述
Standard SRAM, 32KX8, 12ns, CMOS, PDSO28, 0.300 INCH, SOJ-28

W24L257ACJ-12 技术参数

生命周期:Obsolete零件包装代码:SOJ
包装说明:SOJ,针数:28
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.41风险等级:5.44
最长访问时间:12 nsJESD-30 代码:R-PDSO-J28
长度:18.03 mm内存密度:262144 bit
内存集成电路类型:STANDARD SRAM内存宽度:8
功能数量:1端子数量:28
字数:32768 words字数代码:32000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:32KX8
封装主体材料:PLASTIC/EPOXY封装代码:SOJ
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
并行/串行:PARALLEL认证状态:Not Qualified
座面最大高度:3.56 mm最大供电电压 (Vsup):3.465 V
最小供电电压 (Vsup):3.135 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子形式:J BEND
端子节距:1.27 mm端子位置:DUAL
宽度:7.62 mm

W24L257ACJ-12 数据手册

 浏览型号W24L257ACJ-12的Datasheet PDF文件第2页浏览型号W24L257ACJ-12的Datasheet PDF文件第3页浏览型号W24L257ACJ-12的Datasheet PDF文件第4页浏览型号W24L257ACJ-12的Datasheet PDF文件第5页浏览型号W24L257ACJ-12的Datasheet PDF文件第6页浏览型号W24L257ACJ-12的Datasheet PDF文件第7页 
W24L257AC  
32K ´ 8 HIGH SPEED CMOS STATIC RAM  
GENERAL DESCRIPTION  
The W24L257AC is a high speed, low power CMOS static RAM organized as 32768 ´ 8 bits that  
operates on a single 3.3-volt power supply. This device is manufactured using Winbond's high  
performance CMOS technology.  
FEATURES  
· High speed access time: 12/15/20 nS (max.)  
· Low power consumption:  
· All inputs and outputs directly TTL compatible  
· Three-state outputs  
- Active: 200 mW (typ.)  
· Available packages: 28-pin 300 mil SOJ,  
skinny DIP and standard type one TSOP  
(8 mm ´ 13.4 mm)  
· Single +3.3V power supply  
· Fully static operation  
PIN CONFIGURATIONS  
BLOCK DIAGRAM  
V
DD  
SS  
V
A14  
A12  
A7  
1
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
V
DD  
A0  
2
WE  
A13  
A8  
.
.
DECODER  
CORE  
3
ARRAY  
A14  
A6  
A5  
4
5
A9  
A4  
6
A11  
OE  
CS  
OE  
WE  
A3  
7
28-DIP  
I/O1  
.
.
CONTROL  
A2  
8
A10  
CS  
DATA I/O  
A1  
I/O8  
9
A0  
10  
11  
12  
13  
14  
I/O8  
I/O7  
I/O6  
I/O5  
I/O4  
I/O1  
I/O2  
I/O3  
PIN DESCRIPTION  
V
SS  
SYMBOL  
DESCRIPTION  
Address Inputs  
A0- A14  
A10  
CS  
1
2
3
4
5
6
7
8
9
10  
11  
12  
13  
14  
OE  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
A11  
A9  
I/O8  
I/O7  
I/O6  
I/O5  
I/O4  
Data Inputs/Outputs  
Chip Select Input  
Write Enable Input  
Output Enable Input  
Power Supply  
I/O1- I/O8  
A8  
A13  
WE  
28-pin  
TSOP  
CS  
DD  
V
A14  
A12  
A7  
V
SS  
I/O3  
I/O2  
I/O1  
A0  
A1  
A2  
WE  
A6  
A5  
OE  
VDD  
VSS  
A4  
A3  
Ground  
Publication Release Date: November 1998  
Revision A1  
- 1 -  

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