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W24L257AQ-15 PDF预览

W24L257AQ-15

更新时间: 2024-11-13 22:05:47
品牌 Logo 应用领域
华邦 - WINBOND /
页数 文件大小 规格书
9页 210K
描述
32K X 8 High Speed CMOS Static RAM

W24L257AQ-15 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TSOP包装说明:8 X 13.4 MM, TSOP1-28
针数:28Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.32.00.41
风险等级:5.84最长访问时间:15 ns
I/O 类型:COMMONJESD-30 代码:R-PDSO-G28
JESD-609代码:e0长度:11.8 mm
内存密度:262144 bit内存集成电路类型:STANDARD SRAM
内存宽度:8功能数量:1
端子数量:28字数:32768 words
字数代码:32000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:32KX8输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TSOP1
封装等效代码:TSSOP28,.53,22封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE并行/串行:PARALLEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3 V
认证状态:Not Qualified座面最大高度:1.2 mm
最大待机电流:0.0002 A最小待机电流:3.14 V
子类别:SRAMs最大压摆率:0.12 mA
最大供电电压 (Vsup):3.465 V最小供电电压 (Vsup):3.135 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.55 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:8 mm

W24L257AQ-15 数据手册

 浏览型号W24L257AQ-15的Datasheet PDF文件第2页浏览型号W24L257AQ-15的Datasheet PDF文件第3页浏览型号W24L257AQ-15的Datasheet PDF文件第4页浏览型号W24L257AQ-15的Datasheet PDF文件第5页浏览型号W24L257AQ-15的Datasheet PDF文件第6页浏览型号W24L257AQ-15的Datasheet PDF文件第7页 
W24L257A  
32K ´ 8 HIGH-SPEED CMOS STATIC RAM  
GENERAL DESCRIPTION  
The W24L257A is a high-speed, low-power CMOS static RAM organized as 32768 ´ 8 bits that  
operates on a single 3.3-volt power supply. This device is manufactured using Winbond's high  
performance CMOS technology.  
FEATURES  
· High-speed access time: 12/15/20 nS (max.)  
· Low-power consumption:  
· All inputs and outputs directly TTL compatible  
· Three-state outputs  
- Active: 200 mW (typ.)  
· Available packages: 28-pin 300 mil SOJ,  
skinny DIP and standard type one TSOP  
(8 mm ´ 13.4 mm)  
· Single +3.3V power supply  
· Fully static operation  
PIN CONFIGURATION  
BLOCK DIAGRAM  
V
DD  
SS  
V
A14  
A12  
A7  
A6  
A5  
A4  
A3  
A2  
A1  
A0  
1
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
V
DD  
2
WE  
A13  
A8  
A0  
3
.
.
DECODER  
CORE  
4
ARRAY  
A14  
5
A9  
A11  
OE  
6
7
28-DIP  
CS  
OE  
WE  
8
A10  
CS  
I/O1  
.
.
CONTROL  
DATA I/O  
9
I/O8  
10  
11  
12  
13  
14  
I/O8  
I/O7  
I/O6  
I/O5  
I/O4  
I/O1  
I/O2  
I/O3  
PIN DESCRIPTION  
V
SS  
SYMBOL  
DESCRIPTION  
Address Inputs  
A0- A14  
A10  
CS  
I/O8  
I/O7  
I/O6  
I/O5  
1
OE  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
2
A11  
A9  
Data Inputs/Outputs  
Chip Select Input  
Write Enable Input  
Output Enable Input  
Power Supply  
3
I/O1- I/O8  
4
A8  
A13  
5
6
WE  
CS  
28-pin  
TSOP  
V
DD  
7
I/O4  
8
A14  
A12  
A7  
V
SS  
9
WE  
I/O3  
I/O2  
I/O1  
A0  
A1  
A2  
10  
11  
12  
13  
14  
A6  
A5  
OE  
VDD  
VSS  
A4  
A3  
Ground  
Publication Release Date: December 1996  
Revision A5  
- 1 -  

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