Datasheet > 存储 > SRAM> W24L01S-55LL

W24L01S-55LL

更新时间： 2024-11-13 22:06:15

品牌	Logo	应用领域
华邦 - WINBOND		/
页数	文件大小	规格书
11页	184K
描述
128K X 8 CMOS STATIC RAM

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数据手册

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W24L01S-55LL 数据手册

W24L01

´ 8 CMOS STATIC RAM

128K

GENERAL DESCRIPTION

The W24L01 is a normal-speed, very low-power CMOS static RAM organized as 131072 ´ 8 bits that

operates on a wide voltage range from 2.7V to 3.6V power supply. The W24L01 family, W24L01-LE

and W24L01-LI, can meet the requirement of various operating temperature. This device is

manufactured using Winbond's high performance CMOS technology.

FEATURES

· Battery back-up operation capability

· Data retention voltage: 1.5V (min.)

· Packaged in 32-pin 450 mil SOP, standard type

one TSOP (8 mm ´ 20 mm), small type one

TSOP (8 mm ´ 13.4 mm) and 48-pin CSP

· Low power consumption

· Access time: 55 nS /70 nS

· 2.7V to 3.6V supply voltage

· Fully static operation

· All inputs and outputs directly TTL compatible

· Three-state outputs

PIN CONFIGURATIONS

BLOCK DIAGRAM

CLK GEN.

PRECHARGE CKT.

A16

A14

A16

A14

CS2

A12

CORE CELL ARRAY

1024 ROWS

32-pin

SOP

128 X 8 COLUMNS

A10

I/O8

I/O7

I/O6

I/O1

I/O2

I/O3

Vss

I/O5

I/O4

I/O1

I/O8

I/O CKT.

COLUMN DECODER

DATA

CNTRL.

A11

CLK

A10

GEN.

CS1

I/O8

I/O7

I/O6

I/O5

I/O4

A13

A15

A8A1A0

A13 A11A10

CS2

A15

VDD

A16

A14

A12

CS1

CS2

32-pin

TSOP

I/O3

I/O2

I/O1

PIN DESCRIPTION

SYMBOL

DESCRIPTION

Address Inputs

Data Inputs/Outputs

A0 - A16

I/O1 - I/O8

48-pin CSP TOP VIEW

Chip Select Input

CS, CS2

CS2

Write Enable Input

Output Enable Input

I/O5

I/O6

I/O1

I/O2

VDD

VSS

I/O3

I/O7

I/O8

Power Supply

Ground

No Connection

A16 A15 I/O4

A12 A13 A14

CS1

A11

A10

Publication Release Date: January 2, 2002

Revision A6

- 1 -

12 3 4 5 6 7...11

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