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W24L11-70L PDF预览

W24L11-70L

更新时间: 2024-11-13 22:35:35
品牌 Logo 应用领域
华邦 - WINBOND 存储内存集成电路静态存储器光电二极管
页数 文件大小 规格书
11页 172K
描述
128K X 8 High Speed CMOS Static RAM

W24L11-70L 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:0.600 INCH, PLASTIC, DIP-32
针数:32Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.32.00.41
风险等级:5.67Is Samacsys:N
最长访问时间:70 nsI/O 类型:COMMON
JESD-30 代码:R-PDIP-T32JESD-609代码:e0
长度:41.91 mm内存密度:1048576 bit
内存集成电路类型:STANDARD SRAM内存宽度:8
功能数量:1端子数量:32
字数:131072 words字数代码:128000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:128KX8
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP32,.6
封装形状:RECTANGULAR封装形式:IN-LINE
并行/串行:PARALLEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:3.3 V认证状态:Not Qualified
座面最大高度:5.33 mm最小待机电流:2 V
子类别:SRAMs最大压摆率:0.04 mA
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:NO
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:15.24 mm
Base Number Matches:1

W24L11-70L 数据手册

 浏览型号W24L11-70L的Datasheet PDF文件第2页浏览型号W24L11-70L的Datasheet PDF文件第3页浏览型号W24L11-70L的Datasheet PDF文件第4页浏览型号W24L11-70L的Datasheet PDF文件第5页浏览型号W24L11-70L的Datasheet PDF文件第6页浏览型号W24L11-70L的Datasheet PDF文件第7页 
Preliminary W24L11  
128K ´ 8 CMOS STATIC RAM  
GENERAL DESCRIPTION  
´
The W24L11 is a normal-speed, very low-power CMOS static RAM organized as 131072 8 bits that  
operates on a wide voltage range from 3.0V to 3.6V power supply. This device is manufactured using  
Winbond's high performance CMOS technology.  
FEATURES  
·
·
·
·
·
Low power consumption:  
Three-state outputs  
-
Active: 144 mW (max.)  
Battery back-up operation capability  
Data retention voltage: 2V (min.)  
Packaged in 600 mil DIP, 450 mil SOP,  
standard type one, TSOP (8 mm 20 mm) ,  
small type one and TSOP (8 mm 13.4 mm)  
·
·
·
·
Access time: 70 nS  
Single 3.3V power supply  
Fully static operation  
´
´
All inputs and outputs directly TTL compatible  
PIN CONFIGURATIONS  
BLOCK DIAGRAM  
PRECHARGE CKT.  
A16  
A14  
32  
31  
V
DD  
NC  
A16  
A14  
1
A4  
A3  
2
A15  
30  
CS2  
3
A7  
A6  
4
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
A12  
A7  
WE  
A13  
A8  
5
A6  
A5  
A4  
A3  
A2  
A1  
A0  
6
A9  
A9  
7
I/O1  
:
A11  
8
9
OE  
A0  
A13  
A1  
A10  
10  
11  
12  
13  
14  
15  
16  
A10  
WE  
CS1  
CS1  
I/O8  
I/O7  
I/O6  
I/O5  
I/O4  
OE  
I/O1  
I/O2  
I/O3  
PIN DESCRIPTION  
V
SS  
SYMBOL  
DESCRIPTION  
Address Inputs  
A0- A16  
A11  
A9  
A8  
1
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
Data Inputs/Outputs  
Chip Select Input  
-
I/O1 I/O8  
A13  
I/O8  
WE  
CS2  
A15  
CS1  
, CS2  
V
DD  
32-pin  
NC  
V
SS  
A16  
A14  
A12  
A7  
A6  
A5  
Write Enable Input  
WE  
Output Enable Input  
Power Supply  
Ground  
OE  
A4  
DD  
V
SS  
V
NC  
No Connection  
Publication Release Date: October 1999  
Revision A1  
- 1 -  

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