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W24L11Q-55LE PDF预览

W24L11Q-55LE

更新时间: 2024-11-14 18:30:43
品牌 Logo 应用领域
华邦 - WINBOND 静态存储器光电二极管内存集成电路
页数 文件大小 规格书
12页 239K
描述
Standard SRAM, 128KX8, 55ns, CMOS, PDSO32, 8 X 13.40 MM, TSOP1-32

W24L11Q-55LE 技术参数

生命周期:Obsolete零件包装代码:TSOP1
包装说明:TSOP1,针数:32
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.41风险等级:5.78
最长访问时间:55 ns其他特性:CAN ALSO OPERATE AT 5V SUPPLY
JESD-30 代码:R-PDSO-G32JESD-609代码:e3
长度:11.8 mm内存密度:1048576 bit
内存集成电路类型:STANDARD SRAM内存宽度:8
功能数量:1端子数量:32
字数:131072 words字数代码:128000
工作模式:ASYNCHRONOUS最高工作温度:85 °C
最低工作温度:-20 °C组织:128KX8
封装主体材料:PLASTIC/EPOXY封装代码:TSOP1
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE
并行/串行:PARALLEL认证状态:Not Qualified
座面最大高度:1.2 mm最大供电电压 (Vsup):3.465 V
最小供电电压 (Vsup):3.135 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:OTHER端子面层:MATTE TIN
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL宽度:8 mm
Base Number Matches:1

W24L11Q-55LE 数据手册

 浏览型号W24L11Q-55LE的Datasheet PDF文件第2页浏览型号W24L11Q-55LE的Datasheet PDF文件第3页浏览型号W24L11Q-55LE的Datasheet PDF文件第4页浏览型号W24L11Q-55LE的Datasheet PDF文件第5页浏览型号W24L11Q-55LE的Datasheet PDF文件第6页浏览型号W24L11Q-55LE的Datasheet PDF文件第7页 
W24L11  
´ 8 CMOS STATIC RAM  
128K  
GENERAL DESCRIPTION  
The W24L11 is a normal-speed, very low-power CMOS static RAM organized as 131072 ´ 8 bits that  
operates on a wide voltage range from 3.3V to 5V power supply. This device is manufactured using  
Winbond's high performance CMOS technology.  
FEATURES  
· Low power consumption  
· Access time: 55/70 nS  
· 3.3V/5V power supply  
· Fully static operation  
· All inputs and outputs directly TTL compatible  
· Three-state outputs  
· Battery back-up operation capability  
· Data retention voltage: 2V (min.)  
· Packaged 450 mil SOP, standard type one,  
TSOP (8 mm ´ 20 mm), small type one and  
TSOP (8 mm ´ 13.4 mm)  
PIN CONFIGURATIONS  
BLOCK DIAGRAM  
PRECHARGE CKT.  
CLK GEN.  
A16  
A14  
32  
31  
V
DD  
NC  
A16  
A14  
1
A12  
A4  
R
O
W
CORE CELL ARRAY  
1024 ROWS  
2
A15  
CS2  
A3  
30  
3
D
E
C
O
D
E
R
128 X 8 COLUMNS  
A2  
A7  
A6  
A12  
A7  
A6  
A5  
A4  
A3  
4
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
#WE  
A13  
A8  
5
A5  
A9  
6
A9  
7
I/O1  
:
I/O8  
I/O CKT.  
DATA  
CNTRL.  
32-pin  
SOP  
A11  
COLUMN DECODER  
8
CLK  
GEN.  
#OE  
A10  
9
A2  
A1  
A0  
10  
11  
12  
13  
14  
15  
16  
A15 A13 A8 A1A0 A11A10  
#WE  
#CS1  
I/O8  
I/O7  
I/O6  
I/O5  
I/O4  
#CS1  
CS2  
#OE  
I/O1  
I/O2  
I/O3  
PIN DESCRIPTION  
V
SS  
SYMBOL  
DESCRIPTION  
#OE  
A11  
A9  
A8  
A13  
#WE  
1
2
3
4
5
6
7
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
A10  
#CS1  
Address Inputs  
A0- A16  
I/O1- I/O8  
#CS1, CS2  
#WE  
I/O8  
I/O7  
I/O6  
I/O5  
I/O4  
Data Inputs/Outputs  
Chip Select Input  
Write Enable Input  
Output Enable Input  
Power Supply  
CS2  
A15  
V
DD  
8
9
32-pin  
TSOP  
NC  
A16  
A14  
A12  
A7  
A6  
A5  
A4  
V
SS  
10  
11  
12  
13  
14  
15  
16  
I/O3  
I/O2  
I/O1  
A0  
A1  
A2  
A3  
#OE  
VDD  
VSS  
Ground  
NC  
No Connection  
Publication Release Date: August 7, 2001  
Revision A4  
- 1 -  

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