5秒后页面跳转
VSC834 PDF预览

VSC834

更新时间: 2024-01-06 19:53:51
品牌 Logo 应用领域
VITESSE 开关监控
页数 文件大小 规格书
16页 166K
描述
2.5Gb/s 17 x 17 Crosspoint Switch with Input Signal Activity (ISA) Monitoring

VSC834 技术参数

生命周期:Transferred零件包装代码:BGA
包装说明:BGA,针数:256
Reach Compliance Code:compliant风险等级:5.77
Is Samacsys:N边界扫描:NO
外部数据总线宽度:17JESD-30 代码:S-PBGA-B256
长度:27 mm低功率模式:NO
端子数量:256最高工作温度:85 °C
最低工作温度:输出数据总线宽度:17
封装主体材料:PLASTIC/EPOXY封装代码:BGA
封装形状:SQUARE封装形式:GRID ARRAY
认证状态:Not Qualified座面最大高度:1.95 mm
最大供电电压:3.465 V最小供电电压:3.135 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:OTHER
端子形式:BALL端子节距:1.27 mm
端子位置:BOTTOM宽度:27 mm
uPs/uCs/外围集成电路类型:DSP PERIPHERAL, CROSSBAR SWITCHBase Number Matches:1

VSC834 数据手册

 浏览型号VSC834的Datasheet PDF文件第2页浏览型号VSC834的Datasheet PDF文件第3页浏览型号VSC834的Datasheet PDF文件第4页浏览型号VSC834的Datasheet PDF文件第5页浏览型号VSC834的Datasheet PDF文件第6页浏览型号VSC834的Datasheet PDF文件第7页 
VITESSE  
SEMICONDUCTOR CORPORATION  
Datasheet  
2.5Gb/s 17x17 Crosspoint Switch  
with Input Signal Activity (ISA) Monitoring  
VSC834  
Features  
• 17 Input by 17 Output Crosspoint Switch  
• On-chip 50Input Terminations  
• 50Source Terminated PECL Output Drivers  
• Single 3.3V Supply  
• 2.5Gb/s NRZ Data Bandwidth  
• 42 Gb/s Aggregate Bandwidth  
• TTL Compatible µP Interface  
• Differential PECL Data Inputs  
• 9W Maximum Power Dissipation  
• High Performance 256 Pin BGA Package  
General Description  
The VSC834 is a monolithic 17x17 asynchronous crosspoint switch designed to carry broadband data  
streams at up to 2.5Gb/s. The non-blocking switch core is programmed through a parallel microprocessor inter-  
face that allows random access programming of each output port. A high degree of signal integrity is main-  
tained through the chip through fully differential signal paths.  
The crosspoint function is based on a multiplexer tree architecture. Each data output is driven by a 17:1  
multiplexer tree that can be programmed to one and only one of its 17 inputs, and each data input can be pro-  
grammed to multiple outputs. The signal path is unregistered, so no clock is required for the data inputs. The  
signal path is asynchronous, so there are no restrictions on the phase, frequency, or signal pattern at each input.  
Each input channel has an activity monitor function that can be used to identify loss of activity (LOA). An inter-  
rupt pin is provided to signal LOA, after which an external controller can query the chip to determine the chan-  
nel(s) on which the fault occurred.  
Each output driver is a fully differential switched current driver with on-die back-terminations for maxi-  
mum signal integrity. Data inputs are terminated on die through 50resistors connected to V  
.
TERM  
The parallel interface uses TTL levels, and provides address, data, and control pins that are compatible with  
a microprocessor-style interface. The control port provides access to all chip functions, including LOA, and  
programming. Program buffering is provided to allow multiple program assignments to be queued and issued  
simultaneously via a single configure command.  
VSC834 Block Diagram  
Y0  
A0  
Y16  
A16  
Control Logic  
µP Interface  
G52247-0, Rev 4.2  
02/09/01  
Page 1  
© VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012  
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com  
Internet: www.vitesse.com  

与VSC834相关器件

型号 品牌 获取价格 描述 数据表
VSC834UB VITESSE

获取价格

2.5Gb/s 17 x 17 Crosspoint Switch with Input Signal Activity (ISA) Monitoring
VSC835 VITESSE

获取价格

34x34 Crosspoint Switch with Signal Detection
VSC837 VITESSE

获取价格

3.2Gb/s 68x68 Crosspoint Switch
VSC8373 MICROSEMI

获取价格

Telecom IC,
VSC8373 VITESSE

获取价格

Telecom IC,
VSC837UG VITESSE

获取价格

3.2Gb/s 68x68 Crosspoint Switch
VSC837VN VITESSE

获取价格

Crossbar Switch, CMOS, PBGA480, 37.50 X 37.50 MM, TBGA-480
VSC838 VITESSE

获取价格

3.2Gb/s 36x37 Crosspoint Switch
VSC838UG VITESSE

获取价格

3.2Gb/s 36x37 Crosspoint Switch
VSC838UG-01 VITESSE

获取价格

Telecom IC,