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VSC8477 PDF预览

VSC8477

更新时间: 2024-10-28 19:57:03
品牌 Logo 应用领域
美高森美 - MICROSEMI /
页数 文件大小 规格书
2页 451K
描述
Telecom IC,

VSC8477 技术参数

生命周期:Obsolete包装说明:,
Reach Compliance Code:compliant风险等级:5.71
Base Number Matches:1

VSC8477 数据手册

 浏览型号VSC8477的Datasheet PDF文件第2页 
TRANSPORT PRODUCTS  
VSC8477  
9.953 to 10.709 Gb/s / 11.3 Gb/s SONET/SDH/10GE Transceiver with Real-Time  
Data Eye Monitor and Sampling Optimization  
F E A T U R E S :  
Pin Compatible with the VSC8473  
A Smart-Link TM Family Product: Allows for Real-Time Optimization of  
the Data Eye Sample Point without the Need for External FEC Feedback  
Programmable High-Speed Input Voltage and Phase Offset Adjustment  
with Dual-Channel Sampling Architecture  
16:1 Mux/Demux Transceiver With Integrated Clock Multiplier Unit,  
and Clock and Data Recov-ery Unit with Limiting Amplifier  
0.13µm CMOS Process Technology  
A P P L I C A T I O N S :  
Integrated Programmable VGA with PC Trace Equalizer Circuitry  
Full Data Eye Phase & Voltage Threshold Adjust  
300 pin MSA LR Transponder Modules  
Optical Performance Monitors  
Non-Invasive Data Eye Monitoring & Tracking: User Definable  
Control Algorithms for Acquisitions, Tracking, Error Profiling and Data  
Eye Mapping/Monitoring  
DWDM and TDM SONET/SDH Line Cards  
10GE and Fibre Channel to SFI-4 SERDES Applications  
XFP Module XFI to Host SERDES Applications  
Add/Drop Multiplexers  
Built-In Relative Bit Error Rate Monitoring  
Six Configurable Analog Input/Output Signals to Control TIA (VSC7999)  
and Other Devices  
Full Support for 300-Pin MSA Transponder Modules  
S P E C I F I C A T I O N S :  
Dual Personality Microcontroller Interface Port:  
- I2C or SPI Interface Selectable  
Frequency of Operation:  
- VSC8477  
9.95 Gb/s to 10.709 Gb/s  
- Programmable Registers for Access to All Control/Status Signals  
- VSC8477-01 9.95 Gb/s to 11.3 Gb/s  
Serial Input Voltage Offset Adjust  
Phase Sample Resolution < 1.0 ps (256 Steps Over Two Periods)  
Voltage Sample Resolution < 0.5% of Full Scale (256 Steps Over  
the Full Eye Amplitude)  
Serial Data Inversion and Low-Speed Bit Order Swap  
High-Speed CML Clock Output with Power Down Mode  
Relative Bit Error Rate Counter: Up to 2E16 Bit Periods in Length  
10mV Input Data Sensitivity (differential)  
OIF 99.102.8 LVDS Compatible Parallel Data Inputs and Outputs  
1.8V Single Power Supply with Optional 3.3V LVTTL I/O  
1.4 Watt Typical Power  
-5°C Ambient to 90°C Case Temperature  
17mm x 17mm, 244-Ball, CBGA Package  
PB-VSC8477-001  

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