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VSC8479YHQ-01 PDF预览

VSC8479YHQ-01

更新时间: 2024-10-28 20:55:55
品牌 Logo 应用领域
美高森美 - MICROSEMI 以太网:16GBASE-T电信电信集成电路
页数 文件大小 规格书
2页 247K
描述
Ethernet Transceiver, CMOS, PBGA195, FCBGA-195

VSC8479YHQ-01 技术参数

生命周期:Active包装说明:BGA,
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.76JESD-30 代码:S-PBGA-B195
功能数量:1端子数量:195
封装主体材料:PLASTIC/EPOXY封装代码:BGA
封装形状:SQUARE封装形式:GRID ARRAY
标称供电电压:1.8 V表面贴装:YES
技术:CMOS电信集成电路类型:ETHERNET TRANSCEIVER
端子形式:BALL端子位置:BOTTOM
Base Number Matches:1

VSC8479YHQ-01 数据手册

 浏览型号VSC8479YHQ-01的Datasheet PDF文件第2页 
VSC8479  
9.95 Gbps to 11.3 Gbps 16-bit Transceiver  
The VSC8479 is a 1:16, 16:1 transceiver with integrated Clock and Data Recovery unit (CDR) and Clock  
Multiplier Unit (CMU) that provides the most comprehensive solution available in the industry. Continuous  
frequency of operation spans from 9.953 Gbps to 11.3 Gbps over full temperature range.  
Targeted for XFP Host ASIC SERDES, 300 pin module and DWDM line card applications, the VSC8479 provides  
industry leading optimization of power, performance, programmability, price and feature integration. The  
1.15 W total power dissipation enables 300 pin MSA module vendors to provide performance and functionality  
advantages while dropping the overall power dissipation of their existing modules. The VSC8479 is a perfect  
choice for XFP motherboards with proven inter-operability with all major XFP module vendors.  
The receiver path has a high sensitivity receiver with a programmable VGA and input bandwidth equalization  
(EQ) to provide stressed input data eye compensation. No external post amplifier is required for most  
applications. The high-speed output is swing and pre-emphasis programmable to support a variety laser driver  
and XFI host ASIC applications.  
The VSC8479 fully supports all features, functions and clock modes required for 300-pin multi-source  
agreement (MSA) transponder module full compliance. All loopback modes are supported with multiple line  
timing clock modes.  
A highly flexible reference clock source selection and reference clock clean-up support scheme is provided to  
minimize external circuitry. A selectable two-wire serial or Serial Peripheral Interface (SPI) provides full micro-  
controller access to all status and control registers, including software read-back capability of all external control  
input pins. Any combination of discrete pins and serial register status and control can be employed. A highly  
flexible PRBS and user defined pattern checker and error count provides system analysis and built-in self-  
testing.  
Robust cross talk immunity enables the VSC8479 to operate the Tx and Rx paths asynchronously to each  
other while exceeding SONET level jitter generation and jitter tolerance performance. A high-speed output clock  
can be optionally enabled for higher performance applications. An adjustable loss of signal (LOS) indicator is  
integrated into the device enabling optical modulation amplitude monitoring.  
The power supply scheme provides a high degree of flexibility. The device can operate on a single +1.8 V supply  
with an optional +3.3 V I/O supply for 3.3 V compliant interfacing. The Tx path and Rx path can be powered  
down independently. The single chip, small footprint (17 x 17 mm) allows for both cost reduction and board size  
reduction for price and size aggressive, small form factor module applications. All VSC8479 devices are tested  
at high-speed to insure the highest performance and quality standards you’ve come to expect from Microsemi.  
TXPCLK with Phase Adjust  
FIFO Alarm  
TXMCLK  
FIFO  
16:1  
MUX  
High-Speed Clock*  
High-Speed Data  
16 × 16  
CMU  
SFI-4  
Phase 1/  
XSBI  
TXPICLK  
16Low-Speed Data  
Tx Ref Clock  
Ref Clk  
Rx Ref Clock Distribution and  
Clean up  
Ex Ref Clock  
Support  
Loopback  
and BIST  
Line Loopback  
Diagnostic Loopback  
RXMCLK  
RXPOCLK  
16Low-Speed Data  
Adjustable LOS  
CDR  
SFI-4  
Phase 1/  
XSBI  
1:16  
DEMUX  
EQ  
High-Speed Data  
VGA  
Control/Status Signals  
I2C / SPI  
Interface  
Mute Controls  
Invert Controls  
LOL Alarms  
*With Enable/Disable  
External Pin Read Back  
Two-wire Interface / SPI Port  
Microsemi makes no warranty, representation, or guarantee regarding the information contained herein or the suitability of its products and services for any particular purpose, nor does Microsemi assume any liability  
whatsoever arising out of the application or use of any product or circuit. The products sold hereunder and any other products sold by Microsemi have been subject to limited testing and should not be used in conjunction  
with mission-critical equipment or applications. Any performance specifications are believed to be reliable but are not verified, and Buyer must conduct and complete all performance and other testing of the products, alone  
and together with, or installed in, any end-products. Buyer shall not rely on any data and performance specifications or parameters provided by Microsemi. It is the Buyers responsibility to independently determine suitability  
of any products and to test and verify the same. The information provided by Microsemi hereunder is provided “as is, where is” and with all faults, and the entire risk associated with such information is entirely with the Buyer.  
Microsemi does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any other IP rights, whether with regard to such information itself or anything described by such information. Information provided in  
this document is proprietary to Microsemi, and Microsemi reserves the right to make any changes to the information in this document or to any products and services at any time without notice.  

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