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VSC837VN

更新时间： 2024-01-17 11:10:19

品牌	Logo	应用领域
VITESSE		开关
页数	文件大小	规格书
26页	342K
描述
Crossbar Switch, CMOS, PBGA480, 37.50 X 37.50 MM, TBGA-480

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技术参数
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VSC837VN 技术参数

生命周期：	Transferred	零件包装代码：	BGA
包装说明：	BGA,	针数：	480
Reach Compliance Code：	compliant	风险等级：	5.71
边界扫描：	NO	JESD-30 代码：	S-PBGA-B480
长度：	37.5 mm	低功率模式：	YES
端子数量：	480	最高工作温度：	85 °C
最低工作温度：		封装主体材料：	PLASTIC/EPOXY
封装代码：	BGA	封装形状：	SQUARE
封装形式：	GRID ARRAY	认证状态：	Not Qualified
座面最大高度：	1.925 mm	最大供电电压：	2.625 V
最小供电电压：	2.375 V	标称供电电压：	2.5 V
表面贴装：	YES	技术：	CMOS
温度等级：	OTHER	端子形式：	BALL
端子节距：	1.27 mm	端子位置：	BOTTOM
宽度：	37.5 mm	uPs/uCs/外围集成电路类型：	DSP PERIPHERAL, CROSSBAR SWITCH
Base Number Matches：	1

VSC837VN 数据手册

VITESSE

SEMICONDUCTOR CORPORATION

Preliminary Data Sheet

3.2Gb/s

68x68 Crosspoint Switch

VSC837

Features

• Single 2.5V Supply

• 68 Input by 68 Output Crosspoint Switch

• Differential CML Output Driver

• 3.2Gb/s NRZ Data Bandwidth

• 11W typ/14W max (low drive mode)

13W typ/16W max (high drive mode)

• 66MHz Multi-Mode Programming Port

• TTL/2.5V CMOS Control I/O (3.3V tolerant)

• Programmable On-Chip I/O Termination

• Input Signal Activity (ISA) Monitoring Function

• Hard and Soft Power-Down for Unused Channels

• High Performance 37.5mm, 480 TBGA Package

• Integrated Signal Equalization (ISE) for

Deterministic Jitter Reduction

General Description

The VSC837 is a monolithic 68x68 asynchronous crosspoint switch, designed to carry broadband data

streams. The non-blocking switch core is programmed through a triple-mode port interface that allows random

access programming of each input/output port. A high degree of signal integrity is maintained throughout the

chip via fully differential signal paths.

The crosspoint function is based on a multiplexer array architecture. Each data output is driven by a 68:1

multiplexer that can be programmed to one and only one of its 68 inputs. The signal path is unregistered and

fully asynchronous, so there are no restrictions on the phase, frequency, or signal pattern at each input.

Each high-speed output is a fully differential switched current driver with switchable on-die terminations

for maximum signal integrity. Data inputs are terminated on die through 100Ω resistors between true and com-

plement inputs (see Input Termination section for further detail).

A triple-mode programming interface is provided that allows programming commands to be sent as serial

data or one of two forms of parallel data. The input-referred mode (burst mode) allows an input port to be routed

to all outputs in only 4 program cycles. Core programming can be random for each port address, or multiple

program assignments can be queued and issued simultaneously. The programming may be initialized to a

“straight-through” configuration (A0 to Y0, A1 to Y1, etc.) using the INITB pin.

An activity monitor is provided to allow in-system diagnostics. The activity monitor can observe any high-

speed input via an internal 69th multiplexer.

Unused channels may be powered down to allow efficient use of the switch in applications that require only

a subset of the channels. Power-down can be accomplished in hardware, via dedicated power pins for pairs of

input and output channels, or in software by programming individual unused outputs with a disable code.

VSC837 Block Diagram

A67

Y67

control

Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com

Internet: www.vitesse.com

G52309-0, Rev 3.0

02/16/01

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