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TSI574-10GCLYZ PDF预览

TSI574-10GCLYZ

更新时间: 2024-09-20 19:42:23
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
2页 85K
描述
Telecom IC

TSI574-10GCLYZ 技术参数

生命周期:Active包装说明:,
Reach Compliance Code:compliant风险等级:5.28
Base Number Matches:1

TSI574-10GCLYZ 数据手册

 浏览型号TSI574-10GCLYZ的Datasheet PDF文件第2页 
Tsi574™  
4/8 SERIAL RAPIDIO SWITCH  
The Tundra Semiconductor Corporation (Tundra) Tsi574TM is a third  
generation RapidIO switch supporting 40 Gbits/s aggregate bandwidth. The  
Tsi574 is part of a family of switches that enable customers to develop  
systems with robust features and high performance at low cost.  
Features  
Serial RapdIO Interfaces  
• 40 Gbits/s Full-Duplex Serial RapidIO Switch  
• Open Standard Compliant  
RapidIO Interconnect Specification  
(Revision 1.3)  
The Tsi574 provides designers and architects with maximum scalability to  
design the device into a wide range of applications. Flexible port  
configurations can be selected through multiple port width and frequency  
options.  
Building on the industry leading Tsi564ATM 4/8 Port Serial RapidIO Switch,  
the Tsi574 contains all the benefits of its predecessor plus enhances the  
fabric switching capabilities through the addition of multicast, traffic  
management through scheduling algorithms, programmable buffer depth,  
and fabric performance monitoring to supervise and manage traffic flow.  
– IEEE 1149.6 AC-JTAG  
Configurable  
• Up to four 4x links  
• Up to eight 1x links  
• Each 4x link can be separated into two,  
1x links  
• Supports 1.25, 2.5 and 3.125 Gbaud  
rates  
Block Diagram  
• Hot Swap  
– Live insertion and extraction of field  
replaceable units  
Multicast  
Engine  
• I2C Master/Slave  
• Multicast event control symbol  
• Lane swap  
SP0  
(4x or 1x)  
SP2  
(4x or 1x)  
The Tsi574 enhances system scalability  
through device configuration and provides  
architects and designers with a solution for  
both throughput intensive and power  
sensitive applications.  
SP1  
SP3  
(1x only)  
(1x only)  
Enhanced Internal  
Switching Fabric  
SP4  
(4x or 1x)  
SP6  
(4x or 1x)  
SP5  
(1x only)  
SP7  
(1x only)  
Performance  
• Low latency through packet cut-  
through  
Registers  
• Full duplex, line rate termination, non-  
blocking fabric  
2
JTAG  
I
C
• Prevention of head-of-line blocking  
• Error management extensions  
• Multicast  
80B803B_BK001_02  
Master and  
Slave Devices  
IEEE1149.6 Boundary Scan  
• Performance monitoring and statistic  
registers  
• Programmable buffer management  
• Additional scheduling algorithms  
Embedded applications further benefit from the ability to route packets to  
multiple endpoints through hierarchical lookup tables, independent unicast  
and multicast routing mechanisms, and error management extensions that  
provide proactive issue notification to the fabric controller. In addition, the  
Tsi574 supports both in-band serial RapidIO access and out-of-band access  
to the full fabric register set through the I2C interface.  
Low Power  
• Programmable SerDes  
• Configurable on port width and speed  
• Configurable port power down  
• Further power savings from Tsi564A  
Cost  
• Integrated SerDes  
• Small, 399 FCBGA, 21mm package  

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