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TSI576-10GCLV PDF预览

TSI576-10GCLV

更新时间: 2024-11-09 10:00:35
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
2页 84K
描述
Telecom IC,

TSI576-10GCLV 数据手册

 浏览型号TSI576-10GCLV的Datasheet PDF文件第2页 
Tsi576™  
12 Port Serial RapidIO Switch  
The Tundra Semiconductor Corporation (Tundra) Tsi576TM is part of Tundras  
third generation RapidIO switch family supporting 40 Gbits/s aggregate  
bandwidth. The Tsi576 enables customers to develop systems with robust  
features and high performance at low cost.  
Features  
Serial RapidIO Interfaces  
• 40 Gbits/s aggregate bandwidth  
• RapidIO Interconnect Specification (Revision  
1.3) compliant  
• Low latency with cut-through capability  
• Port flexibility fulfills multiple I/O bandwidth  
requirements:  
The Tsi576 provides designers and architects with maximum scalability to  
design the device into a wide range of applications. Flexible port  
configurations can be selected through multiple port width and frequency  
options. Each of the ports can be run at 1.25 Gbaud, 2.5 Gbaud or 3.125  
Gbaud.  
– Up to twelve 1x mode ports or  
two 4x mode plus eight 1x mode ports  
– Port frequency configuration to 1.25, 2.5,  
and 3.125 Gbits/s  
Building on Tundras industry leading RapidIO switch family, the Tsi576  
contains all the benefits of its predecessors plus enhances the fabric  
switching capabilities through the addition of multicast, traffic management  
through scheduling algorithms, programmable buffer depth, and fabric  
performance monitoring to supervise and manage traffic flow.  
– Support for mixed speed configurations  
– Multicast Event Control Symbol  
• Low Power  
– 200 mW per port power dissipation  
– Programmable SerDes  
– Configurable on port width and speed  
– Per port power down  
Block Diagram  
• High performance hardware multicast provides  
simultaneous packet replication on any  
number of ports  
Multicast  
Engine  
• Error management extensions  
– Proactive issue notification of endpoints  
connected to switch, supports port writes  
• Integrated high-speed, full-duplex SerDes with  
8b/10b encoding  
SP0  
(1x)  
SP2  
(1x)  
SP1  
(1x)  
SP3  
(1x)  
– Receiver equalization, transmit pre-  
emphasis, transmit voltage swing  
– IEEE 1149.6 and 1149.1 JTAG support  
– Lane swap to ease signal layout routing  
• Full duplex, line rate termination, non-blocking  
fabric  
SP4  
(1x)  
SP6  
(1x)  
Enhanced Internal  
Switching Fabric  
SP5  
(1x)  
SP7  
(1x)  
– First Come First Served, SP1 and SP2  
scheduling algorithms, supporting traffic  
shaping per ingress port based on board  
and system level traffic models  
– Performance monitoring on individual ports  
– Programmable buffer management to  
ensure dedicated bandwidth for high  
priority packets  
SP8  
SP10  
(4x or 1x)  
(4x or 1x)  
SP9  
(1x)  
SP11  
(1x)  
Registers  
– Provisions to eliminate low priority packet  
starvation  
2
JTAG  
I C  
– Low Latency through packet cut-through  
– Prevention of head-of-line blocking  
• Supports packet routing tables for 64,000  
endpoints  
80B804A_BK001_01  
Master and  
Slave Devices  
IEEE1149.6 Boundary Scan  
Embedded applications further benefit from the ability of the Tsi576 to route  
packets to multiple endpoints through hierarchical lookup tables,  
independent unicast and multicast routing mechanisms, and error  
management extensions that provide proactive issue notification to the  
fabric controller. In addition, the Tsi576 supports both in-band serial RapidIO  
access and out-of-band access to the full fabric register set through the I2C  
interface.  
Other Device Capabilities  
I2C Interface  
-
-
Master and Slave  
Configuration through register initialization  
Hot Swappable Ports  
Enables use in field replaceable blade  
applications  

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