Datasheet > TSI574-10GCLZ

TSI574-10GCLZ

更新时间： 2024-09-20 21:20:15

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
2页	67K
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Telecom IC

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TSI574-10GCLZ 技术参数

生命周期：	Active	包装说明：	,
Reach Compliance Code：	compliant	风险等级：	5.28
Base Number Matches：	1

TSI574-10GCLZ 数据手册

™

Tsi574

4/8 Port Serial RapidIO Switch Feature Sheet

Features

The Tsi574 Advantage

The Tundra Semiconductor Corporation (Tundra) Tsi574 is a third

• 40Gbits/s Full-Duplex Serial RapidIO Switch

generation RapidIO switch supporting 40 Gbits/s aggregate bandwidth.

The Tsi574 is part of a family of switches that enable customers to develop

systems with robust features and high performance at low cost.

•

Open Standard Compliant

- RapidIO Interconnect Specification

(Revision 1.3)

IEEE 1149.6 AC-JTAG

The Tsi574 provides designers and architects with maximum scalability to

design the device into a wide range of applications. Flexible port

configurations can be selected through multiple port width and frequency

options.

Configurable

•

Up to four 4x links

Up to eight 1x links

Each 4x link can be separated into two, 1x

links

Supports 1.25, 2.5 and 3.125 Gbaud rates

Hot Swap

- Live insertion and extraction of field

replaceable units

I²C Master/Slave

Multicast event control symbol

Lane swap

Building on the industry leading Tsi564A 4/8 Port Serial RapidIO

Switch, the Tsi574 contains all the benefits of its predecessor plus

enhances the fabric switching capabilities through the addition of

multicast, traffic management through scheduling algorithms,

programmable buffer depth, and fabric performance monitoring to

supervise and manage traffic flow.

•

Embedded applications further benefit from the ability to route packets to

multiple endpoints through hierarchical lookup tables, independent unicast

and multicast routing mechanisms, and error management extensions that

provide proactive issue notification to the fabric controller. In addition, the

Tsi574 supports both in-band serial RapidIO access and out-of-band access

to the full fabric register set through the I C interface.

The Tsi574 enhances system scalability through

device configuration and provides architects and

designers with a solution for both throughput

intensive and power sensitive applications.

Figure 1: Tsi574 Block Diagram

Performance

Multicast

Engine

•

Low latency through packet cut-through

Full duplex, line rate termination,

non-blocking fabric

SP0

(4x or 1x)

SP2

(4x or 1x)

•

Prevention of head-of-line blocking

Error management extensions

Multicast

Performance monitoring and statistic registers

Programmable buffer management

Additional scheduling algorithms

SP1

(1x only)

SP3

(1x only)

Enhanced Internal

Switching Fabric

SP4

(4x or 1x)

SP6

(4x or 1x)

SP5

SP7

(1x only)

Low Power

•

Programmable SerDes

Configurable on port width and speed

Configurable port power down

Further power savings from Tsi564A

Registers

JTAG

I C

80B802B_BK001_01

Cost

Master and

Slave Devices

IEEE1149.6

Boundary Scan

•

Integrated SerDes

Small, 399 FCBGA, 21mm package

Document: 80B803B_FB001_01

- 1 -

中文翻译

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与TSI574-10GCLZ相关器件

型号	品牌	获取价格	描述	数据表
TSI574-10GILYZ	IDT	获取价格	Telecom IC
TSI576-10GCLV	IDT	获取价格	Telecom IC,
TSI576-10GCLYZ	IDT	获取价格	Telecom IC,
TSI576-10GILY	IDT	获取价格	Telecom IC,
TSI576-10GILYZ	IDT	获取价格	Telecom IC
TSI578-10GCLY	IDT	获取价格	Telecom IC, PBGA675
TSI578-10GCLYZ	IDT	获取价格	Telecom IC, PBGA675
TSI578-10GCLZ	IDT	获取价格	Telecom IC, PBGA675
TSI578-10GILYZ	IDT	获取价格	Telecom IC, PBGA675,
TSI578-10GILZ	IDT	获取价格	Telecom IC, PBGA675

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