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TPC8405(TE12L.Q) PDF预览

TPC8405(TE12L.Q)

更新时间: 2024-11-21 19:56:03
品牌 Logo 应用领域
东芝 - TOSHIBA 开关光电二极管晶体管
页数 文件大小 规格书
11页 288K
描述
6000mA, 30V, 2 CHANNEL, N AND P-CHANNEL, Si, SMALL SIGNAL, MOSFET

TPC8405(TE12L.Q) 技术参数

生命周期:Obsolete包装说明:SMALL OUTLINE, R-PDSO-G8
Reach Compliance Code:unknownECCN代码:EAR99
风险等级:5.84配置:SEPARATE, 2 ELEMENTS WITH BUILT-IN DIODE
最小漏源击穿电压:30 V最大漏极电流 (ID):6 A
最大漏源导通电阻:0.033 ΩFET 技术:METAL-OXIDE SEMICONDUCTOR
JESD-30 代码:R-PDSO-G8元件数量:2
端子数量:8工作模式:ENHANCEMENT MODE
封装主体材料:PLASTIC/EPOXY封装形状:RECTANGULAR
封装形式:SMALL OUTLINE极性/信道类型:N-CHANNEL AND P-CHANNEL
表面贴装:YES端子形式:GULL WING
端子位置:DUAL晶体管应用:SWITCHING
晶体管元件材料:SILICONBase Number Matches:1

TPC8405(TE12L.Q) 数据手册

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TPC8405  
TOSHIBA Field Effect Transistor Silicon N, P Channel MOS Type  
(P Channel UMOS IV/N Channel U-MOS III)  
TPC8405  
Lithium Ion Secondary Battery Applications  
Portable Equipment Applications  
Notebook PC Applications  
Unit: mm  
z Low drain-source ON resistance : P Channel R  
= 25 m(typ.)  
= 20 m(typ.)  
DS (ON)  
N Channel R  
DS (ON)  
z High forward transfer admittance : P Channel |Y | = 12S (typ.)  
fs  
N Channel |Y | = 14S (typ.)  
fs  
z Low leakage current : P Channel I  
= 10 μA (V  
= 30 V)  
DSS  
DS  
N Channel I  
= 10 μA (V  
= 30 V)  
DSS  
DS  
z Enhancement-mode  
: P Channel V = 0.8 to 2.0 V (V  
= 10 V, I = 1 mA)  
th  
DS  
D
N Channel V = 1.3 to 2.5 V (V  
= 10 V, I = 1 mA)  
D
th  
DS  
Absolute Maximum Ratings (Ta = 25°C)  
Rating  
Characteristics  
Drain-source voltage  
Symbol  
Unit  
P Channel N Channel  
V
30  
30  
±20  
4.5  
18  
30  
30  
±20  
6
V
V
V
DSS  
Drain-gate voltage (R  
Gate-source voltage  
= 20 kΩ)  
V
GS  
DGR  
V
GSS  
JEDEC  
JEITA  
DC  
Drain current  
Pulse  
(Note 1)  
(Note 1)  
I
D
A
I
24  
DP  
TOSHIBA  
2-6J1E  
Single-device operation  
(Note 3a)  
Drain power  
dissipation  
(t = 10s)  
P
P
P
P
1.5  
1.1  
1.5  
1.1  
D (1)  
Weight: 0.080 g (typ.)  
Single-device value at  
dual operation (Note 3b)  
(Note 2a)  
D (2)  
D (1)  
D (2)  
W
Single-device operation  
(Note 3a)  
Drain power  
dissipation  
0.75  
0.75  
Circuit Configuration  
(t = 10s)  
Single-device value at  
dual operation (Note 3b)  
0.45  
13.2  
0.45  
23.4  
(Note 2b)  
Single pulse avalanche energy  
Avalanche current  
E
mJ  
A
AS  
(Note 4a) (Note 4b)  
I
4.5  
6
AR  
Repetitive avalanche energy  
Single-device value at operation  
E
0.1  
mJ  
AR  
(Note 2a, 3b, 5)  
Channel temperature  
T
150  
°C  
°C  
ch  
Storage temperature range  
T
stg  
55 to 150  
Note: For Notes 1 to 5, refer to the next page.  
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in  
temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e.  
operating temperature/current/voltage, etc.) are within the absolute maximum ratings. Please design the appropriate  
reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/Derating Concept and  
Methods) and individual reliability data (i.e. reliability test report and estimated failure rate, etc).  
This transistor is an electrostatic-sensitive device. Handle with care.  
1
2009-09-29  

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