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TMS470PLF111 PDF预览

TMS470PLF111

更新时间： 2024-11-12 04:27:51
品牌 Logo 应用领域
德州仪器 - TI 闪存微控制器
页数 文件大小 规格书
63页 844K
描述
16/32-BIT RISC FLASH MICROCONTROLLER

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TMS470PLF111 数据手册

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TMS470PLF111  
16/32-BIT RISC FLASH MICROCONTROLLER  
SPNS113 – OCTOBER 2006  
z
z
High-Performance Static CMOS Technology  
– Class II Serial Interface B (C2SIb)  
– Normal 10.4 Kbps and 4X Mode 41.6 Kbps  
– Inter-Integrated Circuit (I2C) Module  
– Multi-Master and Slave Interfaces  
– Up to 400 Kbps (Fast Mode)  
TMS470 16/32-Bit RISC Core (ARM7TDMI™)  
– 24-MHz System Clock (48-MHz Pipeline)  
– Independent 16/32-Bit Instruction Set  
– Open Architecture With Third-Party Support  
– Built-In Debug Module  
– 7- and 10-Bit Address Capability  
z
High-End Timer (HET)  
z
Integrated Memory  
– 29 Programmable I/O Channels:  
– 25 High-Resolution Pins  
– High-Resolution Share Feature (XOR)  
– High-End Timer RAM  
– 128K-Byte Program Flash  
– One Bank With 10 Contiguous Sectors  
– 32K-Byte Program Flash with ECC  
– One Bank with 4 Contiguous Sectors  
– 8K-Byte Static RAM (SRAM)  
– 64-Instruction Capacity  
z
z
External Clock Prescale (ECP) Module  
– Programmable Low-Frequency External  
Clock (ECLK)  
z
z
Operating Features  
– Low-Power Modes: Doze and Sleep  
– Industrial/Automotive Temperature Ranges  
16-Channel 10-Bit Multi-Buffered ADC  
(MibADC)  
– 64-Word FIFO Buffer  
– Single- or Continuous-Conversion Modes  
– 1.55 μs Minimum Sample/Conversion Time  
– Calibration Mode and Self-Test Features  
System Module  
– 32-Bit Address Space Decoding  
– Bus Supervision for Memory/Peripherals  
– Real-Time Interrupt (RTI) Timer  
– Digital Watchdog (DWD) Timer  
– Analog Watchdog (AWD) Timer  
– Vectored Interrupt Module (VIM) with 32  
Channels  
z
34 Dedicated General-Purpose I/O (GIO) Pins  
and 48 Additional Peripheral I/Os  
– System Integrity and Failure Detection  
– ICE Breaker  
– Cyclic Redundancy Checker (CRC) with  
Parallel Signature Analysis (PSA)  
z
z
32 External Interrupts  
On-Chip Scan-Base Emulation Logic,  
(1)  
IEEE Standard 1149.1 (JTAG) Test-Access  
Port  
z
z
Frequency-Modulated Zero-Pin Phase-Locked  
z
z
144-Pin Pb-Free/Green Plastic Low-Profile  
Quad Flatpack (PGE Suffix)  
Loop (FM PLL)-Based Clock Module With  
Z
Prescaler  
Development System Support Tools Available  
– Code Composer Studio™ Integrated  
Development Environment (IDE)  
– HET Assembler and Simulator  
– Real-Time In-Circuit Emulation  
– Flash Programming  
– Multiply-by-8 Internal FM PLL Option  
Z
Six Communication Interfaces:  
– Serial Peripheral Interface (SPI)  
– 255 Programmable Baud Rates  
– Two Local Interconnect Network Interfaces  
(LINs)  
– Supports the Serial Communication  
Interface (SCI)  
– Standard CAN Controller (SCC)  
– 16-Mailbox Capacity  
– Fully Compliant With CAN Protocol,  
Version 2.0B  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Code Composer Studio is a trademark of Texas Instruments.  
ARM7TDMI is a trademark of Advanced RISC Machines Limited (ARM).  
All trademarks are the property of their respective owners.  
1 The test-access port is compatible with the IEEE Standard 1149.1-1990, IEEE Standard Test-Access Port and Boundary Scan Architecture  
specification. Boundary scan is not supported on this device.  
Copyright © 2006, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication  
date. Products conform to specifications per the Texas  
Instruments standard warranty. Production processing does  
not necessarily include testing of all parameters.  
1
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251-1443  
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