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TISP8210MD PDF预览

TISP8210MD

更新时间: 2024-11-05 08:48:27
品牌 Logo 应用领域
伯恩斯 - BOURNS /
页数 文件大小 规格书
6页 413K
描述
COMPLEMENTARY BUFFERED-GATE SCRS

TISP8210MD 数据手册

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TISP8210MD BUFFERED P-GATE SCR DUAL  
TISP8211MD BUFFERED N-GATE SCR DUAL  
COMPLEMENTARY BUFFERED-GATE SCRS  
FOR DUAL POLARITY SLIC OVERVOLTAGE PROTECTION  
TISP821xMD Overvoltage Protectors  
High Performance Protection for SLICs with +ve & -ve  
Battery Supplies  
TISP8210MD 8-SOIC Package (Top View)  
1
8
7
6
5
G1  
K1  
K2  
G2  
NC  
A
TISP8210MD Negative Overvoltage Protector  
– Wide 0 to -110 V Programming Range  
– Low +5 mA Max. Gate Triggering Current  
– High -150 mA Min. Holding Current  
2
3
4
A
NC  
MDRXAKC  
TISP8211MD Positive Overvoltage Protector  
– Wide 0 to +110 V Programming Range  
– Low -5 mA Max. Gate Triggering Current  
– +20 mA Min. Holding Current  
NC - No internal connection  
TISP8210MD Device Symbol  
K1  
Rated for International Surge Wave Shapes  
IPPSM  
A
Wave Shape  
Standard  
G1  
G2  
2/10  
GR-1089-CORE  
ITU-T K.20/21/45  
GR-1089-CORE  
167  
70  
A
A
10/700  
10/1000  
60  
..................................................UL Recognized Component  
SDRXAJB  
K2  
Circuit Application Diagram  
TISP8211MD 8-SOIC Package (Top View)  
SLIC  
PROTECTION  
1
8
7
6
5
G1  
A1  
A2  
G2  
NC  
Tip  
2
K
3
4
K
C2  
100 nF  
NC  
MDRXALC  
NC - No internal connection  
C1  
100 nF  
TISP8211MD Device Symbol  
A1  
Ring  
G1  
TISP8210MD TISP8211MD  
+VBAT  
K
K
- VBAT  
AI-TISP8-003-a  
G2  
A2  
SDRXAKB  
*RoHS Directive 2002/95/EC Jan 27 2003 including Annex  
JANUARY 2006 - REVISED MAY 2007  
Specifications are subject to change without notice.  
Customers should verify actual device performance in their specific applications.  

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