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SY89826LHI PDF预览

SY89826LHI

更新时间: 2024-11-05 21:19:47
品牌 Logo 应用领域
美国微芯 - MICROCHIP 驱动逻辑集成电路
页数 文件大小 规格书
10页 125K
描述
Low Skew Clock Driver, 89826 Series, 22 True Output(s), 0 Inverted Output(s), PQFP64, TQFP-64

SY89826LHI 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QFP包装说明:TQFP-64
针数:64Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.42
Is Samacsys:N系列:89826
输入调节:DIFFERENTIAL MUXJESD-30 代码:S-PQFP-G64
JESD-609代码:e0长度:10 mm
逻辑集成电路类型:LOW SKEW CLOCK DRIVER湿度敏感等级:3
功能数量:1反相输出次数:
端子数量:64实输出次数:22
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:HTFQFP
封装等效代码:TQFP64,.47SQ封装形状:SQUARE
封装形式:FLATPACK, HEAT SINK/SLUG, THIN PROFILE, FINE PITCH峰值回流温度(摄氏度):240
电源:3.3 VProp。Delay @ Nom-Sup:1.45 ns
传播延迟(tpd):1.45 ns认证状态:Not Qualified
Same Edge Skew-Max(tskwd):0.075 ns座面最大高度:1.2 mm
子类别:Clock Drivers最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn85Pb15)端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:10 mm
最小 fmax:1000 MHzBase Number Matches:1

SY89826LHI 数据手册

 浏览型号SY89826LHI的Datasheet PDF文件第2页浏览型号SY89826LHI的Datasheet PDF文件第3页浏览型号SY89826LHI的Datasheet PDF文件第4页浏览型号SY89826LHI的Datasheet PDF文件第5页浏览型号SY89826LHI的Datasheet PDF文件第6页浏览型号SY89826LHI的Datasheet PDF文件第7页 
            
            
3.3V supply voltage  
®  
3.3V 1GHz PRECISION 1:22 LVDS  
FANOUT BUFFER/TRANSLATOR  
WITH 2:1 INPUT MUX  
®
Precision Edge  
SY89826L  
FEATURES  
High-performance, 1GHz LVDS fanout buffer/  
®
Precision Edge  
translator  
22 differential LVDS output pairs  
DESCRIPTION  
Guaranteed AC parameters over temperature and  
voltage:  
The SY89826L is a precision fanout buffer with 22  
differential LVDS (Low Voltage Differential Swing) output  
pairs. The part is designed for use in low voltage 3.3V  
applications that require a large number of outputs to drive  
precisely aligned, ultra low-skew signals to their destination.  
The input is multiplexed from either LVDS or LVPECL (Low  
Voltage Positive Emitter Coupled Logic) by the CLK_SEL  
pin. The OE (Output Enable) is synchronous so that the  
outputs will only be enabled/disabled when they are already  
in the LOW state. This avoids any chance of generating a  
runt clock pulse when the device is enabled/disabled as  
can happen with an asynchronous control.  
The SY89826L features a low pin-to-pin skew of less  
than 50ps—performance previously unachievable in a  
standard product having such a high number of outputs.  
The SY89826L is available in a single space saving package,  
enabling a lower overall cost solution.  
• > 1GHz f  
• < 50ps within device skew  
• < 400ps t / t time  
MAX  
r
f
Low jitter performance  
• < 1ps (rms) cycle-to-cycle jitter  
• < 1ps (pk-pk) total jitter  
2:1 mux input accepts LVDS and LVPECL  
LVDS input includes internal 100termination  
Output enable function  
Available in a 64-Pin EPAD-TQFP  
APPLICATIONS  
Enterprise networking  
High-end servers  
Communications  
TRUTH TABLE  
FUNCTIONAL BLOCK DIAGRAM  
OE(1)  
CLK_SEL  
Q0 – Q21  
LOW  
/Q0 – /Q21  
HIGH  
100internal input  
termination  
0
0
1
1
0
1
0
1
22 LVDS compatible  
outputs  
CLK_SEL  
0
LOW  
HIGH  
LVDS_CLK  
/LVDS_CLK  
LVDS_CLK  
LVPECL_CLK  
/LVDS_CLK  
/LVPECL_CLK  
22  
22  
Q0 - Q21  
/Q0 - /Q21  
NOTE:  
1. The OE (output enable) signal is synchronized with the low level of the  
LVDS_CLK and LVPECL_CLK signal.  
LVPECL_CLK  
/LVPECL_CLK  
1
Q
LEN  
D
OE  
Precision Edge is a registered trademark of Micrel, Inc.  
Rev.: D  
Amendment: /0  
M9999-011907  
hbwhelp@micrel.com or (408) 955-1690  
1
Issue Date: January 2007  

SY89826LHI 替代型号

型号 品牌 替代类型 描述 数据表
SY89826LHY MICROCHIP

完全替代

89826 SERIES, LOW SKEW CLOCK DRIVER, 22 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP64
SY89826LHY MICREL

类似代替

3.3V 1GHz PRECISION 1:22 LVDS FANOUT BUFFER/TRANSLATOR WITH 2:1 INPUT MUX

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