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SY89829UHG

更新时间： 2024-10-01 19:54:15
品牌 Logo 应用领域
美国微芯 - MICROCHIP 驱动逻辑集成电路
页数 文件大小 规格书
10页 113K
描述
Low Skew Clock Driver, 89829 Series, 20 True Output(s), 0 Inverted Output(s), PQFP64, LEAD FREE, TQFP-64

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SY89829UHG 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：QFP包装说明：LEAD FREE, TQFP-64
针数：64Reach Compliance Code：unknown
HTS代码：8542.39.00.01风险等级：5.61
系列：89829输入调节：DIFFERENTIAL MUX
JESD-30 代码：S-PQFP-G64JESD-609代码：e4
长度：10 mm逻辑集成电路类型：LOW SKEW CLOCK DRIVER
湿度敏感等级：3功能数量：1
反相输出次数：端子数量：64
实输出次数：20最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：HTFQFP封装等效代码：TQFP64,.47SQ
封装形状：SQUARE封装形式：FLATPACK, HEAT SINK/SLUG, THIN PROFILE, FINE PITCH
峰值回流温度（摄氏度）：260电源：2.5/3.3 V
Prop。Delay @ Nom-Sup：1.7 ns传播延迟（tpd）：1.7 ns
认证状态：Not QualifiedSame Edge Skew-Max（tskwd）：0.035 ns
座面最大高度：1.2 mm子类别：Clock Drivers
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：2.37 V
标称供电电压 (Vsup)：2.5 V表面贴装：YES
温度等级：INDUSTRIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：0.5 mm
端子位置：QUAD处于峰值回流温度下的最长时间：40
宽度：10 mm最小 fmax：1000 MHz
Base Number Matches：1

SY89829UHG 数据手册

 浏览型号SY89829UHG的Datasheet PDF文件第2页浏览型号SY89829UHG的Datasheet PDF文件第3页浏览型号SY89829UHG的Datasheet PDF文件第4页浏览型号SY89829UHG的Datasheet PDF文件第5页浏览型号SY89829UHG的Datasheet PDF文件第6页浏览型号SY89829UHG的Datasheet PDF文件第7页 
®  
2.5V/3.3V HIGH-PERFORMANCE, DUAL 1:10  
OR LVPECL CLOCK DRIVER w/ INTERNAL  
TERMINATION AND REDUNDANT SWITCHOVER  
®
Precision Edge  
SY89829U  
FEATURES  
■ Dual 1:10 fanout buffer/translator  
■ Accepts LVPECL or LVDS inputs  
®
Precision Edge  
■ Multiplexed inputs ideal for redundant clock  
DESCRIPTION  
switchover  
■ Guaranteed AC parameters:  
The SY89829U is a High Performance dual 1:10 or  
single 1:20 LVPECL Clock Driver. The part is designed for  
use in low voltage (2.5V/3.3V) applications which require a  
large number of outputs to drive precisely aligned, ultra low  
skew signals to their destination. The input is multiplexed  
from either LVDS or LVPECL by the CLK_SEL pin. The  
LVDS inputs include a 100Ω internal termination across  
the input pair, thus eliminating any need for external  
termination. The 2:1 input mux makes this device an ideal  
choice for redundant clock applications that need to switch  
between two reference clocks. The output enable (OE) is  
synchronous so that the outputs will only be enabled/  
disabled when they are already in the LOW state. This  
eliminates any chance of generating a runt clock pulse  
when the device is enabled/disabled as can happen with an  
asynchronous control.  
• > 1GHz fMAX (toggle)  
• < 50ps ch-ch skew  
■ LVDS input includes 100Ω internal termination  
■ Low supply voltage: 2.5V, 3.3V  
■ –40°C to +85°C temperature range  
■ Output enable (OE) pin  
■ Available in 64 EPAD-TQFP  
APPLICATIONS  
■ High-performance PCs  
■ Workstations  
The SY89829U features low pin-to-pin skew (50ps max.)  
and low part-to-part skew (200ps max.)—performance  
previously unachievable in a standard product having such  
a high number of outputs. The SY89829U is available in a  
single space saving package which provides a lower overall  
cost solution. In addition, a single chip solution improves  
timing budgets by eliminating the multiple device solution  
with their corresponding large part-to-part skew.  
■ Parallel processor-based systems  
■ Other high-performance computing  
■ Communications  
■ Redundant LVPECL or LVDS bus clock switchover  
Precision Edge is a registered trademark of Micrel, Inc.  
Rev.: D  
Amendment: /0  
M9999-120205  
hbwhelp@micrel.com or (408) 955-1690  
1
Issue Date: November 2005  
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中文翻译

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 		Low Skew Clock Driver, 89829 Series, 20 True Output(s), 0 Inverted Output(s), PQFP64, TQFP
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 		89829 SERIES, LOW SKEW CLOCK DRIVER, 20 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP64
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 		2.5V/3.3V HIGH-PERFORMANCE, DUAL 1:10 OR LVPECL CLOCK DRIVER w/ INTERNAL TERMINATION AND R
SY89829UHY-TR MICROCHIP

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 		89829 SERIES, LOW SKEW CLOCK DRIVER, 20 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP64
SY89830U MICREL

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 		2.5V/3.3/5V 2.5GHz 1:4 PECL/ECL CLOCK DRIVER WITH 2:1 DIFFERENTIAL INPUT MUX

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