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SY89829U

更新时间: 2024-11-10 14:54:39
品牌 Logo 应用领域
美国微芯 - MICROCHIP /
页数 文件大小 规格书
10页 73K
描述
The SY89829U is a High Performance dual 1:10 or single 1:20 LVPECL Clock Driver. The part is desig

SY89829U 数据手册

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®  
2.5V/3.3V HIGH-PERFORMANCE, DUAL 1:10  
OR LVPECL CLOCK DRIVER w/ INTERNAL  
TERMINATION AND REDUNDANT SWITCHOVER  
®
Precision Edge  
SY89829U  
FEATURES  
Dual 1:10 fanout buffer/translator  
Accepts LVPECL or LVDS inputs  
®
Precision Edge  
Multiplexed inputs ideal for redundant clock  
DESCRIPTION  
switchover  
Guaranteed AC parameters:  
The SY89829U is a High Performance dual 1:10 or  
single 1:20 LVPECL Clock Driver. The part is designed for  
use in low voltage (2.5V/3.3V) applications which require a  
large number of outputs to drive precisely aligned, ultra low  
skew signals to their destination. The input is multiplexed  
from either LVDS or LVPECL by the CLK_SEL pin. The  
LVDS inputs include a 100internal termination across  
the input pair, thus eliminating any need for external  
termination. The 2:1 input mux makes this device an ideal  
choice for redundant clock applications that need to switch  
between two reference clocks. The output enable (OE) is  
synchronous so that the outputs will only be enabled/  
disabled when they are already in the LOW state. This  
eliminates any chance of generating a runt clock pulse  
when the device is enabled/disabled as can happen with an  
asynchronous control.  
• > 2GHz fMAX (toggle)  
• < 50ps ch-ch skew  
LVDS input includes 100internal termination  
Low supply voltage: 2.5V, 3.3V  
–40°C to +85°C temperature range  
Output enable (OE) pin  
Available in 64 EPAD-TQFP  
APPLICATIONS  
High-performance PCs  
Workstations  
The SY89829U features low pin-to-pin skew (50ps max.)  
and low part-to-part skew (200ps max.)—performance  
previously unachievable in a standard product having such  
a high number of outputs. The SY89829U is available in a  
single space saving package which provides a lower overall  
cost solution. In addition, a single chip solution improves  
timing budgets by eliminating the multiple device solution  
with their corresponding large part-to-part skew.  
Parallel processor-based systems  
Other high-performance computing  
Communications  
Redundant LVPECL or LVDS bus clock switchover  
Precision Edge is a registered trademark of Micrel, Inc.  
Rev.: D  
Amendment: /0  
M9999-011907  
hbwhelp@micrel.com or (408) 955-1690  
1
Issue Date: January 2007  

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