SY89537LMGTR

更新时间： 2024-11-11 03:09:15

品牌	Logo	应用领域
麦瑞 - MICREL		时钟
页数	文件大小	规格书
19页	819K
描述
3.3V Precision LVPECL and LVDS Programmable Multiple Output Bank Clock Synthesizer and Fanout Buffer

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SY89537LMGTR 数据手册

SY89537L

3.3V Precision LVPECL and LVDS

Programmable Multiple Output Bank Clock

Synthesizer and Fanout Buffer

General Description

The SY89537L integrated programmable clock

synthesizer and fanout is part of a precision PLL-

based clock generation family optimized for enterprise

switch, router, and multiprocessor server applications.

This family is ideal for generating internal system

timing requirements up to 700MHz for multiple ASICs,

FPGAs, and NPUs. These devices integrate the

following blocks into a single monolithic IC:

Precision Edge^®

Features

• Integrated programmable synthesizer with multiple

output dividers, fanout buffers, and clock drivers

• Direct interface to crystal: 14MHz to 18MHz

• Input MUX accepts a reference and a crystal

•

PLL (Phase-Lock-Loop) based synthesizer

Fanout buffers

(XTAL) source

– Ideal for reference backup clock source or

system test frequency source

– Patent-pending unique input MUX isolates XTAL

and reference inputs minimizes crosstalk

Clock generator (dividers)

Logic translation (LVPECL, LVDS)

Five independently programmable output

banks

• Guaranteed AC performance:

– 87.15MHz to 700MHz output frequency range

(with RFCK at 16.6MHz)

– <100ps_PPtotal jitter

– <7ps_RMScycle-to-cycle jitter

– <8ps_PPdeterministic jitter

This level of integration minimizes additive jitter and

part-to-part skew associated with discrete alternatives,

resulting in superior system-level timing with reduced

board space and power. For applications that require

a zero-delay function, see the SY89538L.

All support documentation can be found on

Micrel’s web site at: www.micrel.com.

– <0.7ps_RMScrosstalk induced jitter

– <50ps bank-to-bank skew

• Output bank synchronization control pin

• LVPECL and LVDS outputs

• TTL/CMOS compatible control logic

Applications

• Enterprise routers, switches, servers and

• Five independently programmable output

workstations

frequency banks:

• Parallel processor-based systems

– Four differential LVPECL output banks

– One differential LVDS output bank with 3 output

pairs

• Internal system clock generation for ASICs, NPUs,

FPGAs

• Separate output enable for each bank

• 3.3V ±10% power supply (2.5V output capable)

Markets

• LAN/WAN

• Enterprise servers

• Test and measurement

• Guaranteed over the commercial and industrial

temperature range (-40C to +85C)

• Available in 44-pin (7mm x 7mm) MLF™ package

Precision Edge is a registered trademark of Micrel, Inc.

MLF and MicroLeadFrame are trademarks of Amkor Technology, Inc.

Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com

M9999-080305

hbwhelp@micrel.com or (408) 955-1690

August 2005

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SY89537LMGTR 替代型号

型号	品牌	替代类型	描述	数据表
SY89537LMHTR	MICREL	完全替代	756MHz, OTHER CLOCK GENERATOR, QCC44, 7 X 7 MM, LEAD FREE, MO-220, MLF-44
SY89537LMG	MICREL	完全替代	3.3V Precision LVPECL and LVDS Programmable Multiple Output Bank Clock Synthesizer and Fan

与SY89537LMGTR相关器件

型号	品牌	获取价格	描述	数据表
SY89537LMG-TR	MICROCHIP	获取价格	756MHz, OTHER CLOCK GENERATOR, QCC44
SY89537LMH	MICROCHIP	获取价格	756MHz, OTHER CLOCK GENERATOR, QCC44
SY89537LMHTR	MICREL	获取价格	756MHz, OTHER CLOCK GENERATOR, QCC44, 7 X 7 MM, LEAD FREE, MO-220, MLF-44
SY89537LMY	MICROCHIP	获取价格	756MHz, OTHER CLOCK GENERATOR, QCC44
SY89537LMYTR	MICREL	获取价格	3.3V Precision LVPECL and LVDS
SY89537LMY-TR	MICROCHIP	获取价格	756MHz, OTHER CLOCK GENERATOR, QCC44
SY89537LMZTR	MICREL	获取价格	暂无描述
SY89538L	MICREL	获取价格	3.3V PRECISION LVPECL AND LVDS PROGRAMMABLE MULTIPLE OUTPUT BANK CLOCK SYNTHESIZER AND FAN
SY89538L_06	MICREL	获取价格	3.3V, Precision LVPECL and LVDS Programmable Multiple Output Bank Clock Synthesizer and Fa
SY89538L_08	MICREL	获取价格	3.3V, Precision LVPECL and LVDS Programmable Multiple Output Bank Clock Synthesizer

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