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SY89537LMY PDF预览

SY89537LMY

更新时间: 2024-09-30 15:53:19
品牌 Logo 应用领域
美国微芯 - MICROCHIP 时钟外围集成电路晶体
页数 文件大小 规格书
19页 752K
描述
756MHz, OTHER CLOCK GENERATOR, QCC44

SY89537LMY 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:HVQCCN,Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:1.04JESD-30 代码:S-XQCC-N44
JESD-609代码:e3长度:7 mm
湿度敏感等级:2端子数量:44
最高工作温度:85 °C最低工作温度:-40 °C
最大输出时钟频率:756 MHz封装主体材料:UNSPECIFIED
封装代码:HVQCCN封装形状:SQUARE
封装形式:CHIP CARRIER峰值回流温度(摄氏度):260
主时钟/晶体标称频率:144 MHz认证状态:Not Qualified
座面最大高度:1 mm最大供电电压:3.63 V
最小供电电压:2.97 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn) - annealed
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:40
宽度:7 mmuPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHER
Base Number Matches:1

SY89537LMY 数据手册

 浏览型号SY89537LMY的Datasheet PDF文件第2页浏览型号SY89537LMY的Datasheet PDF文件第3页浏览型号SY89537LMY的Datasheet PDF文件第4页浏览型号SY89537LMY的Datasheet PDF文件第5页浏览型号SY89537LMY的Datasheet PDF文件第6页浏览型号SY89537LMY的Datasheet PDF文件第7页 
SY89537L  
3.3V Precision LVPECL and LVDS  
Programmable Multiple Output Bank Clock  
Synthesizer and Fanout Buffer  
General Description  
The SY89537L integrated programmable clock  
synthesizer and fanout is part of a precision PLL-  
based clock generation family optimized for enterprise  
switch, router, and multiprocessor server applications.  
This family is ideal for generating internal system  
timing requirements up to 700MHz for multiple ASICs,  
FPGAs, and NPUs. These devices integrate the  
following blocks into a single monolithic IC:  
Precision Edge®  
Features  
Integrated programmable synthesizer with multiple  
output dividers, fanout buffers, and clock drivers  
Direct interface to crystal: 14MHz to 18MHz  
Input MUX accepts a reference and a crystal  
PLL (Phase-Lock-Loop) based synthesizer  
Fanout buffers  
(XTAL) source  
– Ideal for reference backup clock source or  
system test frequency source  
– Patent-pending unique input MUX isolates XTAL  
and reference inputs minimizes crosstalk  
Clock generator (dividers)  
Logic translation (LVPECL, LVDS)  
Five independently programmable output  
banks  
Guaranteed AC performance:  
– 87.15MHz to 700MHz output frequency range  
(with RFCK at 16.6MHz)  
– <100psPP total jitter  
– <7psRMS cycle-to-cycle jitter  
– <8psPP deterministic jitter  
This level of integration minimizes additive jitter and  
part-to-part skew associated with discrete alternatives,  
resulting in superior system-level timing with reduced  
board space and power. For applications that require  
a zero-delay function, see the SY89538L.  
All support documentation can be found on  
Micrel’s web site at: www.micrel.com.  
– <0.7psRMS crosstalk induced jitter  
– <50ps bank-to-bank skew  
Output bank synchronization control pin  
LVPECL and LVDS outputs  
TTL/CMOS compatible control logic  
Applications  
Enterprise routers, switches, servers and  
workstations  
Five independently programmable output  
Parallel processor-based systems  
frequency banks:  
Internal system clock generation for ASICs, NPUs,  
– Four differential LVPECL output banks  
– One differential LVDS output bank with 3 output  
pairs  
FPGAs  
Markets  
Separate output enable for each bank  
3.3V ±10% power supply (2.5V output capable)  
LAN/WAN  
Enterprise servers  
Test and measurement  
Guaranteed over the commercial and industrial  
temperature range (-40C to +85C)  
Available in 44-pin (7mm x 7mm) QFN package  
Precision Edge is a registered trademark of Micrel, Inc.  
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com  
M9999-121207-B  
hbwhelp@micrel.com or (408) 955-1690  
December 2007  

SY89537LMY 替代型号

型号 品牌 替代类型 描述 数据表
SY89537LMY-TR MICROCHIP

完全替代

756MHz, OTHER CLOCK GENERATOR, QCC44
SY89537LMG MICROCHIP

类似代替

756MHz, OTHER CLOCK GENERATOR, QCC44

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SPECIALTY INTERFACE CIRCUIT, PQFP64