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SY89538LHY

更新时间： 2024-11-11 08:56:31

品牌	Logo	应用领域
麦瑞 - MICREL		时钟
页数	文件大小	规格书
23页	632K
描述
3.3V, Precision LVPECL and LVDS Programmable Multiple Output Bank Clock Synthesizer

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SY89538LHY 数据手册

SY89538L

3.3V, Precision LVPECL and LVDS

Programmable Multiple Output Bank Clock

Synthesizer and Fanout Buffer with Zero Delay

General Description

The SY89538L integrated programmable clock

synthesizer and fanout is part of a precision PLL-

based clock generation family optimized for

enterprise switch, router, and multiprocessor server

applications. This family is ideal for generating

internal system timing requirements up to 750MHz for

multiple ASICs, FPGAs, and NPUs. These devices

integrate the following blocks into a single monolithic

IC:

Precision Edge^®

Features

• Integrated programmable synthesizer with multiple

output dividers, fanout buffers, and clock drivers

• Zero-delay capability: 29.375MHz to 756MHz

• Reference clock input: 9.325MHz to 756MHz

•

PLL (Phase-Lock-Loop) based synthesizer

Zero-delay MUX and feedback capability

1:4 LVPECL fanout

• Input MUX accepts a reference and a crystal

(XTAL) source

– Ideal for reference backup clock source or

system test frequency source

– Patent-pending unique input MUX isolates XTAL

and reference inputs which minimizes crosstalk

1:3 LVDS fanout

Clock generator (dividers)

• Guaranteed AC performance:

– Output frequency range: 29.375MHz to 756MHz

– <150ps_PPtotal jitter

Logic translation (LVPECL, LVDS)

Five-independently programmable output

banks

– <6ps_RMScycle-to-cycle jitter (XTAL Input)

– <8ps_PPdeterministic jitter

This level of integration minimizes additive jitter and

part-to-part skew associated with discrete

– <0.7ps_RMScrosstalk induced jitter

– <75ps output-to-output skew

• TTL/CMOS-compatible control logic

• Five-independently programmable output

frequency banks:

alternatives, resulting in superior system-level timing

with reduced board space and power. For

applications that do not require a zero-delay function,

see the SY89537L.

All support documentation can be found on

Micrel’s web site at: www.micrel.com.

– Four differential LVPECL output banks

– One differential LVDS output bank with three

output pairs

• Output bank synchronization control pin

• Output enable

Applications

• Enterprise routers, switches, servers and

workstations

• Parallel processor-based systems

• 3.3V ±10% power supply (2.5V output capable)

• Internal system clock generation for ASICs, NPUs

• Guaranteed over the industrial temperature range

and FPGAs

(-40°C to +85°C)

• Available in a 64-pin EPAD-TQFP

Markets

• LAN/WAN

• Enterprise servers

• Test and measurement

Precision Edge is a registered trademark of Micrel, Inc.

MLF and MicroLeadFrame are registered trademarks of Amkor Technology.

Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com

M9999-010808-E

hbwhelp@micrel.com or (408) 955-1690

January 2008

12 3 4 5 6 7...23

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与SY89538LHY相关器件

型号	品牌	获取价格	描述	数据表
SY89538LHYTR	MICREL	获取价格	3.3V, Precision LVPECL and LVDS Programmable Multiple Output Bank Clock Synthesizer
SY89538LHY-TR	MICROCHIP	获取价格	SPECIALTY INTERFACE CIRCUIT, PQFP64
SY89538LHZ	MICREL	获取价格	3.3V, Precision LVPECL and LVDS Programmable Multiple Output Bank Clock Synthesizer
SY89538LHZTR	MICREL	获取价格	3.3V, Precision LVPECL and LVDS Programmable Multiple Output Bank Clock Synthesizer
SY89538LHZ-TR	MICROCHIP	获取价格	SPECIALTY INTERFACE CIRCUIT, PQFP64
SY89540U	MICREL	获取价格	Precision Low Jitter 4x4 LVDS Crosspoint Switch with Internal Termination
SY89540U	MICROCHIP	获取价格	The SY89540U is a low-jitter, low skew, high-speed 4x4 crosspoint switch optimized for pre
SY89540U_10	MICREL	获取价格	Precision Low Jitter 4x4 LVDS Crosspoint
SY89540UMG	MICREL	获取价格	Precision Low Jitter 4x4 LVDS Crosspoint Switch with Internal Termination
SY89540UMGTR	MICREL	获取价格	Precision Low Jitter 4x4 LVDS Crosspoint Switch with Internal Termination

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