SY100S366JCTR

更新时间： 2024-09-12 22:19:47

品牌	Logo	应用领域
麦瑞 - MICREL		比较器
页数	文件大小	规格书
6页	116K
描述
9-BIT COMPARATOR

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中文翻译

获取价格

数据手册

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SY100S366JCTR 数据手册

9-BIT

COMPARATOR

SY100S366

DESCRIPTION

FEATURES

■ Max. propagation delay of 1500ps

■ IEE min. of –120mA

The SY100S366 is an ultra-fast 9-bit magnitude

comparator designed for use in high-performance ECL

systems. The device compares the arithmetic value of two

9-bit words and indicates whether one word is greater than

or equal to the other. The inputs on the device have 75KΩ

pull-down resistors.

■ Industry standard 100K ECL levels

■ Extended supply voltage option:

VEE = –4.2V to –5.5V

■ Voltage and temperature compensation for improved

noise immunity

PIN CONFIGURATIONS

■ Internal 75KΩ input pull-down resistors

■ 120% faster than Fairchild

■ Approximately 40% lower power than Fairchild

■ Function and pinout compatible with Fairchild F100K

11 10 9

8 7 6 5

■ Available in 24-pin CERPACK and 28-pin PLCC

packages

A > B

VCCA

VCC

VEE

VEES

Top View

PLCC

J28-1

VCC

A = B

B > A

19 20 21 22 23 24 25

PIN NAMES

24 23 22 21 20 19

A0 – A8

B0 – B8

A > B

Function

A Data Inputs

Top View

Flatpack

F24-1

B Data Inputs

A Greater Than B Output

B Greater Than A Output

B > A

9 10 11 12

A = B

Complement A Equal to B Output

(Active LOW)

VEES

VCCA

VEE Substrate

VCCO for ECL Outputs

Rev.: G

Amendment:/0

Issue Date: July, 1999

12 3 4 5 6

中文翻译

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