Datasheet > SY100EL29

SY100EL29

更新时间： 2024-11-28 14:52:55

品牌	Logo	应用领域
美国微芯 - MICROCHIP		/
页数	文件大小	规格书
14页	714K
描述
The SY100EL29V is a dual differential register with differential data (inputs and outputs) and clo

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SY100EL29 数据手册

SY100EL29V

5V/3.3V Dual Differential Data and Clock D Flip-Flop with

Set and Reset

Features

General Description

• 3.3V and 5V Power Supply Option

• Differential D, CLK and Q

The SY100EL29V is a dual differential register with

differential data (inputs and outputs) and clock. The

registers are triggered by a positive transition of the

positive clock (CLK) input. A HIGH on the Reset (Rx)

asynchronously resets the appropriate register so that

the Q outputs go LOW. A HIGH on the Set (Sx)

asynchronously resets the appropriate register so that

the Q outputs go HIGH. The Set and Reset inputs

cannot both be HIGH simultaneously.

• Extended V_EERange of –3.0V to –5.5V

• VBB Output for Single-Ended Use

• 1100 MHz Min. Toggle Frequency

• Asynchronous Reset and Set

• Available in 20-Pin SOIC Package

The differential input structures are clamped so that

the inputs of unused registers can be left open without

upsetting the bias network of the devices. The

clamping action will assert the /D and the /CLK sides of

the inputs. The non-inverting input will pull down to V_EE

and the inverting input will be biased around V_CC/2.

Because of the edge-triggered flip-flop nature of the

devices, simultaneously opening both the clock and

data inputs will result in an output which reaches an

unidentified but valid state.

Package Type

SY100EL29V

20-Lead SOIC (Z)

Q1 /Q1 VEE

VCC

/Q0 S0 S1

VCC

20 19 18 17 16 15 14 13 12 11

CLK

The fully differential design of the devices makes them

ideal for very high frequency applications where a

registered data path is necessary.

CLK

CLK1

/D1

/CLK0 VBB D1

/CLK1

/D0

CLK0

 2019 Microchip Technology Inc.

DS20006241A-page 1

12 3 4 5 6 7...14

中文翻译

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与SY100EL29相关器件

型号	品牌	获取价格	描述	数据表
SY100EL29V	MICREL	获取价格	5V/3.3V DUAL DIFFERENTIAL DATA AND CLOCK D FLIP-FLOP w/SET AND RESET
SY100EL29V_06	MICREL	获取价格	5V/3.3V DUAL DIFFERENTIAL DATA AND CLOCKD FLIP-FLOP w/SET AND RESET
SY100EL29VZC	MICROCHIP	获取价格	D Flip-Flop, 100EL Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Output, E
SY100EL29VZC	MICREL	获取价格	5V/3.3V DUAL DIFFERENTIAL DATA AND CLOCK D FLIP-FLOP w/SET AND RESET
SY100EL29VZCTR	MICREL	获取价格	5V/3.3V DUAL DIFFERENTIAL DATA AND CLOCK D FLIP-FLOP w/SET AND RESET
SY100EL29VZCTR	MICROCHIP	获取价格	D Flip-Flop, 100EL Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Output, E
SY100EL29VZG	MICREL	获取价格	5V/3.3V DUAL DIFFERENTIAL DATA AND CLOCKD FLIP-FLOP w/SET AND RESET
SY100EL29VZGTR	MICROCHIP	获取价格	100EL SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO20, 0.30
SY100EL29VZI	MICROCHIP	获取价格	D Flip-Flop, 100EL Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Output, E
SY100EL29VZI	MICREL	获取价格	D Flip-Flop, 100EL Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Output, E

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