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SY100EL29VZG PDF预览

SY100EL29VZG

更新时间: 2024-11-06 01:19:35
品牌 Logo 应用领域
麦瑞 - MICREL 光电二极管逻辑集成电路触发器
页数 文件大小 规格书
5页 59K
描述
5V/3.3V DUAL DIFFERENTIAL DATA AND CLOCKD FLIP-FLOP w/SET AND RESET

SY100EL29VZG 数据手册

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®  
5V/3.3V DUAL DIFFERENTIAL  
DATA AND CLOCK  
D FLIP-FLOP w/SET AND RESET  
®
Precision Edge  
SY100EL29V  
FEATURES  
3.3V and 5V power supply option  
Differential D, CLK and Q  
®
Precision Edge  
Extended V range of –3.0V to –5.5V  
EE  
DESCRIPTION  
V output for single-ended use  
BB  
1100MHz min. toggle frequency  
Asynchronous Reset and Set  
The SY100EL29V is a dual differential register with  
differential data (inputs and outputs) and clock. The  
registers are triggered by a positive transition of the  
positive clock (CLK) input. A HIGH on the Reset (Rx)  
asynchronously resets the appropriate register so that  
the Q outputs go LOW. A HIGH on the Set (Sx)  
asynchronously resets the appropriate register so that  
the Q outputs go HIGH. The Set and Reset inputs cannot  
both be HIGH simultaneously.  
Fully compatible with Motorola MC100LVEL29 and  
MC100EL29  
Available in 20-pin SOIC package  
The differential input structures are clamped so that  
the inputs of unused registers can be left open without  
upsetting the bias network of the devices. The clamping  
action will assert the /D and the /CLK sides of the inputs.  
The noninverting input will pull down to V  
and the  
EE  
inverting input will be biased around V /2. Because of  
CC  
the edge-triggered flip-flop nature of the devices,  
simultaneously opening both the clock and data inputs  
will result in an output which reaches an unidentified but  
valid state.  
The fully differential design of the devices makes them  
ideal for very high frequency applications where a  
registered data path is necessary.  
PIN NAMES  
TRUTH TABLE  
Pin  
CLK, /CLK  
D[0:1], /D[0:1]  
Q[0:1], /Q[0:1]  
R0, R1  
Function  
Differential Clock Inputs  
Differential Data Inputs  
Differential Data Outputs  
Reset Inputs  
R
S
L
D
L
CLK  
Z
Q
/Q  
L
L
H
H
L
L
H
X
X
X
Z
L
H
H
L
L
X
L
H
H
X
H
L
S0, S1  
Set Inputs  
H
X
Undef  
Undef  
VBB  
VBB Reference Output  
VCC  
NOTE:  
Z = LOW-to-HIGH Transition  
VCC  
VEE  
VEE  
Precision Edge is a registered trademark of Micrel, Inc.  
Rev.: E  
Amendment:/0  
M9999-031306  
hbwhelp@micrel.com or (408) 955-1690  
1
Issue Date: March 2006  

SY100EL29VZG 替代型号

型号 品牌 替代类型 描述 数据表
MC100EP29DTG ONSEMI

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3.3V / 5V ECL Dual Differential Data and Clock D Flip−Flop With Set and Reset
MC100LVEL29DWG ONSEMI

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3.3V ECL Dual Differential Data and Clock D Flip−Flop With Set and Reset

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