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SY100EL31ZCTR PDF预览

SY100EL31ZCTR

更新时间: 2024-11-23 22:13:19
品牌 Logo 应用领域
麦瑞 - MICREL 触发器锁存器逻辑集成电路光电二极管
页数 文件大小 规格书
4页 51K
描述
D FLIP-FLOP WITH SET AND RESET

SY100EL31ZCTR 技术参数

是否Rohs认证:不符合生命周期:Transferred
零件包装代码:SOIC包装说明:SOP, SOP8,.25
针数:8Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.15
Is Samacsys:N系列:100EL
JESD-30 代码:R-PDSO-G8JESD-609代码:e0
长度:4.93 mm逻辑集成电路类型:D FLIP-FLOP
最大频率@ Nom-Sup:2800000000 Hz湿度敏感等级:1
位数:1功能数量:1
端子数量:8最高工作温度:85 °C
最低工作温度:输出特性:OPEN-EMITTER
输出极性:COMPLEMENTARY封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP8,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):240
电源:-4.5 V最大电源电流(ICC):37 mA
传播延迟(tpd):0.59 ns认证状态:Not Qualified
座面最大高度:1.73 mm子类别:FF/Latches
表面贴装:YES技术:ECL
温度等级:COMMERCIAL EXTENDED端子面层:Tin/Lead (Sn85Pb15)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
触发器类型:POSITIVE EDGE宽度:3.94 mm
最小 fmax:2200 MHzBase Number Matches:1

SY100EL31ZCTR 数据手册

 浏览型号SY100EL31ZCTR的Datasheet PDF文件第2页浏览型号SY100EL31ZCTR的Datasheet PDF文件第3页浏览型号SY100EL31ZCTR的Datasheet PDF文件第4页 
D FLIP-FLOP  
WITH SET AND RESET  
SY10EL31  
SY100EL31  
FEATURES  
DESCRIPTION  
475ps propagation delay  
The SY10/100EL31 are D flip-flops with set and reset.  
The devices are functionally equivalent to the E131  
devices, with higher performance capabilities. With  
propagation delays and output transition times  
significantly faster than the E131, the EL31 is ideally  
suited for those applications which require the ultimate  
in AC performance.  
2.8GHz toggle frequency  
Internal 75Kinput pull-down resistors  
Available in 8-pin SOIC package  
Both the set and reset inputs are asynchronous, level  
triggered signals. Data enters the master portion of the  
flip-flop when the clock is LOW and is transferred to the  
slave, and thus the outputs, upon a positive transition of  
the clock.  
PIN NAMES  
PIN CONFIGURATION/BLOCK DIAGRAM  
Pin  
D
Function  
Data Inputs  
Q
Data Outputs  
Set  
S
D
VCC  
1
2
8
7
S
S
Q
Q
D
R
Reset  
Flip-Flop  
CLK  
Clock Input  
CLK  
R
3
4
6
5
R
VEE  
(1)  
TRUTH TABLE  
SOIC  
TOP VIEW  
D
L
S
L
R
L
CLK  
Z
Q
L
H
H
X
X
X
L
L
Z
H
L
L
X
H
H
H
X
L
H
X
Undef  
NOTE:  
1. Z = LOW-to-HIGH transition.  
Rev.: E  
Amendment:/0  
Issue Date: August, 1998  
1

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