SY100E151JZTR

更新时间： 2024-11-23 02:54:39

品牌	Logo	应用领域
麦瑞 - MICREL		/
页数	文件大小	规格书
4页	63K
描述
6-BIT D REGISTER

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

SY100E151JZTR 数据手册

SY10E151

Micrel, Inc.

SY100E151

6-BIT D

SY10E151

SY100E151

DESCRIPTION

FEATURES

■ 1100MHz toggle frequency

■ Extended 100E VEE range of –4.2V to –5.46V

■ Differential outputs

The SY10/100E151 offer 6 edge-triggered, high-speed,

master-slave D-type flip-flops with differential outputs,

designed for use in new, high-performance ECL systems.

The two external clock signals (CLK1, CLK2) are gated

through a logical OR operation before use as clocking

control for the flip-flops. Data is clocked into the flip-flops

on the rising edge of either CLK1 or CLK2 (or both). When

both CLK1 and CLK2 are at a logic LOW, data enters the

master and is transferred to the slave when either CLK1 or

CLK2 (or both) go HIGH.

■ Asynchronous Master Reset

■ Dual clocks

■ Fully compatible with industry standard 10KH,

100K ECL levels

■ Internal 75KΩ input pulldown resistors

■ Fully compatible with Motorola MC10E/100E151

■ Available in 28-pin PLCC package

The MR (Master Reset) signal operates asynchronously

to make all Q outputs go to a logic LOW.

BLOCK DIAGRAM

PIN NAMES

D0–D5

CLK1, CLK2

Function

Data Inputs

Clock Inputs

Master Reset

True Outputs

Inverting Outputs

VCC to Output

Q0–Q5

VCCO

CLK

Rev.: G

Amendment: /0

M9999-032006

hbwhelp@micrel.com or (408) 955-1690

Issue Date: March 2006

12 3 4

中文翻译

下载PDF

与SY100E151JZTR相关器件

型号	品牌	获取价格	描述	数据表
SY100E154	MICREL	获取价格	5-BIT 2:1 MUX-LATCH
SY100E154JC	MICREL	获取价格	5-BIT 2:1 MUX-LATCH
SY100E154JCTR	MICREL	获取价格	5-BIT 2:1 MUX-LATCH
SY100E154JCTR	MICROCHIP	获取价格	D Latch, 100E Series, 1-Func, Low Level Triggered, 5-Bit, Complementary Output, ECL, PQCC2
SY100E154JZ	MICREL	获取价格	5-BIT 2:1 MUX-LATCH
SY100E154JZTR	MICREL	获取价格	5-BIT 2:1 MUX-LATCH
SY100E154JZTR	MICROCHIP	获取价格	100E SERIES, LOW LEVEL TRIGGERED D LATCH, COMPLEMENTARY OUTPUT, PQCC28, LEAD FREE, PLASTIC
SY100E154JZ-TR	MICROCHIP	获取价格	100E SERIES, LOW LEVEL TRIGGERED D LATCH, COMPLEMENTARY OUTPUT, PQCC28
SY100E155	MICREL	获取价格	6-BIT 2:1 MUX-LATCH
SY100E155JC	MICREL	获取价格	6-BIT 2:1 MUX-LATCH