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SY100E158 PDF预览

SY100E158

更新时间: 2024-11-19 22:42:35
品牌 Logo 应用领域
麦瑞 - MICREL 复用器
页数 文件大小 规格书
4页 61K
描述
5-BIT 2:1 MULTIPLEXER

SY100E158 数据手册

 浏览型号SY100E158的Datasheet PDF文件第2页浏览型号SY100E158的Datasheet PDF文件第3页浏览型号SY100E158的Datasheet PDF文件第4页 
5-BIT 2:1  
MULTIPLEXER  
SY10E158  
SY100E158  
FEATURES  
DESCRIPTION  
550ps max. D to output  
The SY10/100E158 offer five 2:1 multiplexers with  
differential outputs, designed for use in new, high-  
performance ECL systems.  
ThemultiplexeroperationiscontrolledbytheSEL(Select)  
signal which selects one of the two bits of input data at each  
mux to be passed through.  
Extended 100E VEE range of –4.2V to –5.5V  
775ps max. SEL to output  
Differential outputs  
Fully compatible with industry standard 10KH,  
100K ECL levels  
Internal 75Kinput pulldown resistors  
Fully compatible with Motorola MC10E/100E158  
Available in 28-pin PLCC package  
PIN CONFIGURATION  
BLOCK DIAGRAM  
D
0a  
0b  
Q
0
0
MUX  
SEL  
D
Q
25 24 23 22 21 20 19  
D4b  
26  
27  
28  
1
18  
17  
16  
15  
14  
13  
12  
Q3  
D
1a  
1b  
Q
1
1
D2a  
D2b  
VEE  
SEL  
D0a  
Q3  
MUX  
SEL  
D
VCC  
Q2  
Q
PLCC  
TOP VIEW  
J28-1  
2
Q2  
D
2a  
2b  
Q
2
2
3
VCCO  
Q1  
MUX  
SEL  
D
D0b  
4
Q
5
6
7
8
9
10 11  
D
3a  
3b  
Q
3
3
MUX  
SEL  
D
Q
D
4a  
4b  
Q
4
4
MUX  
SEL  
D
Q
PIN NAMES  
SEL  
Pin  
D0a–D4a  
D0b–D4b  
SEL  
Function  
Input Data a  
Input Data b  
Select Input  
True Outputs  
Q0–Q4  
Q0–Q4  
VCCO  
Inverted Outputs  
VCC to Outputt  
Rev.: C  
Amendment: /1  
1
Issue Date: February, 1998  

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