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STB90NF3LLT4 PDF预览

STB90NF3LLT4

更新时间: 2024-11-27 14:36:07
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 开关脉冲晶体管
页数 文件大小 规格书
7页 173K
描述
80A, 30V, 0.009ohm, N-CHANNEL, Si, POWER, MOSFET, TO-263AB, D2PAK-3

STB90NF3LLT4 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:D2PAK包装说明:SMALL OUTLINE, R-PSSO-G2
针数:3Reach Compliance Code:not_compliant
ECCN代码:EAR99风险等级:5.88
外壳连接:DRAIN配置:SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压:30 V最大漏极电流 (Abs) (ID):80 A
最大漏极电流 (ID):80 A最大漏源导通电阻:0.009 Ω
FET 技术:METAL-OXIDE SEMICONDUCTORJEDEC-95代码:TO-263AB
JESD-30 代码:R-PSSO-G2JESD-609代码:e0
元件数量:1端子数量:2
工作模式:ENHANCEMENT MODE最高工作温度:175 °C
封装主体材料:PLASTIC/EPOXY封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
极性/信道类型:N-CHANNEL最大功率耗散 (Abs):200 W
最大脉冲漏极电流 (IDM):320 A认证状态:Not Qualified
子类别:FET General Purpose Power表面贴装:YES
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子位置:SINGLE处于峰值回流温度下的最长时间:NOT SPECIFIED
晶体管应用:SWITCHING晶体管元件材料:SILICON
Base Number Matches:1

STB90NF3LLT4 数据手册

 浏览型号STB90NF3LLT4的Datasheet PDF文件第2页浏览型号STB90NF3LLT4的Datasheet PDF文件第3页浏览型号STB90NF3LLT4的Datasheet PDF文件第4页浏览型号STB90NF3LLT4的Datasheet PDF文件第5页浏览型号STB90NF3LLT4的Datasheet PDF文件第6页浏览型号STB90NF3LLT4的Datasheet PDF文件第7页 
STB90NF3LL  
2
N-CHANNEL 30V - 0.0048 - 80A D PAK  
LOW GATE CHARGE STripFET™ II POWER MOSFET  
PRELIMINARY DATA  
V
DSS  
R
I
D
TYPE  
DS(on)  
STB90NF3LL  
30 V  
< 0.0055 Ω  
80 A(#)  
TYPICAL R (on) = 0.0048 @ 10 V  
DS  
OPTIMAL R  
x Qg TRADE-OFF @ 4.5 V  
DS(on)  
CONDUCTION LOSSES REDUCED  
SWITCHING LOSSES REDUCED  
3
2
SURFACE-MOUNTING D PAK (TO-263)  
1
POWER PACKAGE IN TUBE (NO SUFFIX) OR  
IN TAPE & REEL (SUFFIX “T4”)  
2
D PAK  
TO-263  
(Suffix “T4”)  
DESCRIPTION  
This application specific Power MOSFET is the third  
genaration of STMicroelectronis unique "Single Feature  
Size™" strip-based process. The resulting transistor  
shows the best trade-off between on-resistance and gate  
charge. When used as high and low side in buck  
regulators, it gives the best performance in terms of both  
conduction and switching losses. This is extremely  
important for motherboards where fast switching and  
high efficiency are of paramount importance.  
INTERNAL SCHEMATIC DIAGRAM  
APPLICATIONS  
SPECIFICALLY DESIGNED AND OPTIMISED  
FOR HIGH EFFICIENCY CPU CORE DC/DC  
CONVERTERS  
ABSOLUTE MAXIMUM RATINGS  
Symbol  
Parameter  
Value  
30  
Unit  
V
V
Drain-source Voltage (V = 0)  
DS  
GS  
V
Drain-gate Voltage (R = 20 k)  
30  
V
DGR  
GS  
V
Gate- source Voltage  
± 16  
80  
V
GS  
I (#)  
D
Drain Current (continuous) at T = 25°C  
A
C
I
D
Drain Current (continuous) at T = 100°C  
80  
A
C
I
()  
Drain Current (pulsed)  
320  
200  
1.3  
A
DM  
P
Total Dissipation at T = 25°C  
W
tot  
C
Derating Factor  
W/°C  
T
Storage Temperature  
stg  
-55 to 175  
°C  
T
Max. Operating Junction Temperature  
j
() Pulse width limited by safe operating area.  
(#) Value limited by wire bonding  
September 2002  
1/7  
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.  

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