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SPW34119D PDF预览

SPW34119D

更新时间: 2024-09-30 06:13:35
品牌 Logo 应用领域
SECOS 音频放大器
页数 文件大小 规格书
9页 1288K
描述
Low Power Audio Amplifier

SPW34119D 数据手册

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SPW34119D  
Low Power Audio  
Elektronische Bauelemente  
Amplifier  
RoHS Compliant Product  
DIP-8  
Description  
D
GAUGE PLANE  
The SPW34119D is a low power audio amplifier integrated circuit  
intended (primarily) for telephone applications, such as in speaker-  
phones. It provides differential speaker outputs to max. output  
swing at low supply voltages (2V min.). Coupling capacitors to the  
speaker are not required. Open loop gain is 80dB, and the closed  
loop gain is set with two external resistors. A Chip Disable pin  
permits powering down and/or muting the input signal.  
Features  
SEATING PLANE  
b
Ω
* Output Power Exceeds 250 mW with 32 Speaker  
Z
Z
*
Chip Disable Input To Power Down The IC  
SECTION Z - Z  
e
b
* Requires Few External Components  
Ω
* Drives a Wide Range Of Speaker Loads (8 And Up)  
* Wide Operating Supply Voltage Range (2V to 16V),  
Allows Telephone Line Powered Applications  
Millimeter  
Millimeter  
REF.  
REF.  
Min.  
-
Max.  
0.5334  
-
Min.  
0.203  
9.017  
6.096  
7.620  
Max.  
0.279  
10.16  
7.112  
8.255  
A
A1  
A2  
b
b1  
b2  
b3  
c
c1  
D
E
E1  
e
HE  
L
* Gain Adjustable from <0 dB to> 46dB For Voice Band  
0.381  
2.921  
0.356  
0.356  
1.143  
0.762  
0.203  
* Low Quiescent Supply Current (2.7mA Typ) For Battery  
Powered Applications  
4.953  
0.559  
0.508  
1.778  
1.143  
0.356  
2.540 BSC  
* Low Total Harmonic Distortion (0.5% Typ)  
-
10.92  
3.810  
2.921  
Block Diagram and Simplified Application & Pin Configuration  
http://www.SeCoSGmbH.com/  
Any changing of specification will not be informed individual  
01-Jun-2002 Rev. A  
Page 1 of 9  

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