5秒后页面跳转
SNJ54LVTH16373WD PDF预览

SNJ54LVTH16373WD

更新时间: 2024-02-15 09:32:18
品牌 Logo 应用领域
德州仪器 - TI 锁存器输出元件
页数 文件大小 规格书
16页 469K
描述
3.3-V ABT 16-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

SNJ54LVTH16373WD 技术参数

生命周期:Active零件包装代码:DFP
包装说明:DFP, FL48,.4,25针数:48
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
Factory Lead Time:6 weeks风险等级:5.25
控制类型:ENABLE LOW/HIGH计数方向:UNIDIRECTIONAL
系列:LVTJESD-30 代码:R-GDFP-F48
长度:15.875 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.064 A
位数:8功能数量:2
端口数量:2端子数量:48
最高工作温度:125 °C最低工作温度:-55 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DFP
封装等效代码:FL48,.4,25封装形状:RECTANGULAR
封装形式:FLATPACK包装方法:TUBE
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3 V
最大电源电流(ICC):5 mAProp。Delay @ Nom-Sup:4.5 ns
传播延迟(tpd):5.8 ns认证状态:Not Qualified
筛选级别:MIL-PRF-38535座面最大高度:3.05 mm
子类别:FF/Latches最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:BICMOS
温度等级:MILITARY端子形式:FLAT
端子节距:0.635 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED翻译:N/A
宽度:9.655 mmBase Number Matches:1

SNJ54LVTH16373WD 数据手册

 浏览型号SNJ54LVTH16373WD的Datasheet PDF文件第2页浏览型号SNJ54LVTH16373WD的Datasheet PDF文件第3页浏览型号SNJ54LVTH16373WD的Datasheet PDF文件第4页浏览型号SNJ54LVTH16373WD的Datasheet PDF文件第5页浏览型号SNJ54LVTH16373WD的Datasheet PDF文件第6页浏览型号SNJ54LVTH16373WD的Datasheet PDF文件第7页 
SN54LVTH16373, SN74LVTH16373  
3.3-V ABT 16-BIT TRANSPARENT D-TYPE LATCHES  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCBS144OMAY 1992REVISED OCTOBER 2005  
FEATURES  
SN54LVTH16373 . . . WD PACKAGE  
SN74LVTH16373 . . . DGG OR DL PACKAGE  
(TOP VIEW)  
Members of the Texas Instruments Widebus™  
Family  
State-of-the-Art Advanced BiCMOS  
Technology (ABT) Design for 3.3-V Operation  
and Low Static-Power Dissipation  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
1OE  
1Q1  
1Q2  
GND  
1Q3  
1Q4  
1LE  
1D1  
1D2  
GND  
1D3  
1D4  
2
3
Support Mixed-Mode Signal Operation (5-V  
4
Input and Output Voltages With 3.3-V VCC  
)
5
Support Unregulated Battery Operation Down  
to 2.7 V  
6
7
V
CC  
V
CC  
Typical VOLP (Output Ground Bounce) <0.8 V  
at VCC = 3.3 V, TA = 25°C  
8
1Q5  
1Q6  
GND  
1Q7  
1Q8  
2Q1  
2Q2  
GND  
2Q3  
2Q4  
1D5  
1D6  
GND  
1D7  
1D8  
2D1  
2D2  
GND  
2D3  
2D4  
9
Ioff and Power-Up 3-State Support Hot  
Insertion  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
Bus Hold on Data Inputs Eliminates the Need  
for External Pullup/Pulldown Resistors  
Distributed VCC and GND Pins Minimize  
High-Speed Switching Noise  
Flow-Through Architecture Optimizes PCB  
Layout  
V
CC  
V
CC  
Latch-Up Performance Exceeds 500 mA Per  
JESD 17  
2Q5  
2Q6  
GND  
2Q7  
2Q8  
2OE  
2D5  
2D6  
GND  
2D7  
2D8  
2LE  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
DESCRIPTION/ORDERING INFORMATION  
The 'LVTH16373 devices are 16-bit transparent D-type latches with 3-state outputs designed for low-voltage  
(3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. These  
devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working  
registers.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
SN74LVTH16373GRDR  
SN74LVTH16373ZRDR  
SN74LVTH16373DL  
TOP-SIDE MARKING  
LL373  
FBGA – GRD  
Tape and reel  
FBGA – ZRD (Pb-free)  
Tube  
SSOP – DL  
LVTH16373  
LVTH16373  
LL373  
–40°C to 85°C  
–55°C to 125°C  
Tape and reel  
Tape and reel  
SN74LVTH16373DLR  
TSSOP – DGG  
VFBGA – GQL  
VFBGA – ZQL (Pb-free)  
CFP – WD  
SN74LVTH16373DGGR  
SN74LVTH16373GQLR  
SN74LVTH16373ZQLR  
SNJ54LVTH16373WD  
Tape and reel  
Tube  
SNJ54LVTH16373WD  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1992–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
On products compliant to MIL-PRF-38535, all parameters are  
Instruments standard warranty. Production processing does not  
tested unless otherwise noted. On all other products, production  
necessarily include testing of all parameters.  
processing does not necessarily include testing of all parameters.  

与SNJ54LVTH16373WD相关器件

型号 品牌 获取价格 描述 数据表
SNJ54LVTH16374WD TI

获取价格

3.3V ABT 16 BIT EDGE - TRIGGERED D TYPE FLIP FLOPS WITH 3 STATE OUTPUTS
SNJ54LVTH16500WD TI

获取价格

3.3-V ABT 18-BIT UNIVERSAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SNJ54LVTH16501WD TI

获取价格

3.3-V ABT 18-BIT UNIVERSAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SNJ54LVTH16646WD TI

获取价格

3.3-V ABT 16-BIT BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SNJ54LVTH16952WD TI

获取价格

3.3-V ABT 16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS
SNJ54LVTH18245WD TI

获取价格

LVT SERIES, DUAL 9-BIT BOUNDARY SCAN TRANSCEIVER, TRUE OUTPUT, CDFP56
SNJ54LVTH182640WD TI

获取价格

LVT SERIES, DUAL 9-BIT BOUNDARY SCAN TRANSCEIVER, INVERTED OUTPUT, CDFP56
SNJ54LVTH18502AHV TI

获取价格

3.3-V ABT SCAN TEST DEVICES WITH 18-BIT UNIVERSAL BUS TRANSCEIVERS
SNJ54LVTH18514HKC TI

获取价格

LVT SERIES, 20-BIT BOUNDARY SCAN REG TRANSCEIVER, TRUE OUTPUT, CDFP64, CERAMIC, DFP-64
SNJ54LVTH18640WD TI

获取价格

LVT SERIES, DUAL 9-BIT BOUNDARY SCAN TRANSCEIVER, INVERTED OUTPUT, CDFP56