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Datasheet > SN75ALS160DW-00R
SN75ALS160DW-00R PDF预览

SN75ALS160DW-00R

更新时间： 2024-09-20 14:44:55
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管接口集成电路驱动器
页数 文件大小 规格书
18页 894K
描述
LINE TRANSCEIVER, PDSO20

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中文翻译

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SN75ALS160DW-00R 技术参数

生命周期：Obsolete包装说明：SOP,
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.66
差分输出：NO驱动器位数：8
输入特性：SCHMITT TRIGGER接口集成电路类型：LINE TRANSCEIVER
接口标准：IEEE-488JESD-30 代码：R-PDSO-G20
长度：12.8 mm功能数量：1
端子数量：20最高工作温度：70 °C
最低工作温度：输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
认证状态：Not Qualified最大接收延迟：14 ns
接收器位数：8座面最大高度：2.65 mm
最大压摆率：80 mA最大供电电压：5.25 V
最小供电电压：4.75 V标称供电电压：5 V
表面贴装：YES技术：BIPOLAR
温度等级：COMMERCIAL端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
最大传输延迟：20 ns宽度：7.5 mm
Base Number Matches：1

SN75ALS160DW-00R 数据手册

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SLLS018E − JUNE 1986 − REVISED JUNE 2004  
DW OR N PACKAGE  
(TOP VIEW)  
D
D
D
D
D
D
D
D
D
Suitable for IEEE Standard 488-1978 (GPIB)  
8-Channel Bidirectional Transceivers  
High-Speed Advanced Low-Power Schottky  
(ALS) Circuitry  
TE  
B1  
B2  
B3  
B4  
B5  
B6  
B7  
B8  
V
CC  
D1  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18 D2  
17 D3  
16 D4  
Low Power Dissipation  
. . . 46 mW Max Per Channel  
GPIB  
I/O Ports  
Terminal  
I/O Ports  
Fast Propagation Times . . . 20 ns Max  
High-Impedance pnp Inputs  
15  
14  
13  
12  
11  
D5  
D6  
D7  
D8  
PE  
Receiver Hysteresis . . . 650 mV Typ  
Open-Collector Driver Output Option  
No Loading of Bus When Device Is  
GND  
Powered Down (V  
= 0)  
CC  
D
Power-Up/Power-Down Protection  
(Glitch Free)  
description/ordering information  
The SN75ALS160 eight-channel general-purpose interface bus transceivers are monolithic, high-speed,  
advanced low-power Schottky (ALS) devices designed for two-way data communications over single-ended  
transmission lines. This device is designed to meet the requirements of IEEE Standard 488-1978. The  
transceivers feature driver outputs that can be operated in either the passive-pullup or 3-state mode. If talk  
enable (TE) is high, these ports have the characteristics of passive-pullup outputs when pullup enable (PE) is  
low and of 3-state outputs when PE is high. Taking TE low places these ports in the high-impedance state. The  
driver outputs are designed to handle loads up to 48 mA of sink current.  
An active turn-off feature has been incorporated into the bus-terminating resistors so that the device exhibits  
a high impedance to the bus when V  
management transceiver, the pair provides the complete 16-wire interface for the IEEE-488 bus.  
= 0. When combined with the SN75ALS161 or SN75ALS162 bus  
CC  
The SN75ALS160 is characterized for operation from 0°C to 70°C.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
PACKAGE  
T
A
PDIP (N)  
Tube of 20  
Tube of 25  
SN75ALS160N  
SN75ALS160N  
SN75ALS160DW  
0°C to 70°C  
SOIC (DW)  
75ALS160  
Reel of 2000 SN75ALS160DWR  
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design  
guidelines are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
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Copyright 2004, Texas Instruments Incorporated  
ꢐꢛ ꢚ ꢦꢡꢠ ꢞ ꢟ ꢠ ꢚꢘ ꢙꢚ ꢛ ꢜ ꢞ ꢚ ꢟ ꢣꢢ ꢠ ꢗꢙ ꢗꢠꢝ ꢞꢗ ꢚꢘꢟ ꢣꢢ ꢛ ꢞꢨ ꢢ ꢞꢢ ꢛ ꢜꢟ ꢚꢙ ꢋꢢꢩ ꢝꢟ ꢒꢘꢟ ꢞꢛ ꢡꢜ ꢢꢘꢞ ꢟ  
ꢟ ꢞ ꢝ ꢘꢦ ꢝ ꢛꢦ ꢪ ꢝ ꢛꢛ ꢝ ꢘ ꢞꢫꢧ ꢐꢛ ꢚ ꢦꢡꢠ ꢞꢗꢚꢘ ꢣꢛ ꢚꢠ ꢢꢟ ꢟꢗ ꢘꢬ ꢦꢚꢢ ꢟ ꢘꢚꢞ ꢘꢢ ꢠꢢ ꢟꢟ ꢝꢛ ꢗꢥ ꢫ ꢗꢘꢠ ꢥꢡꢦ ꢢ  
ꢞ ꢢ ꢟ ꢞꢗ ꢘꢬ ꢚꢙ ꢝ ꢥꢥ ꢣꢝ ꢛ ꢝ ꢜ ꢢ ꢞ ꢢ ꢛ ꢟ ꢧ  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...18

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